Commit 88ddc1f8 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Geert Uytterhoeven
Browse files

clk: renesas: r8a7796: Add VSP clocks 



Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent f4407a6e

drivers/clk/renesas/r8a7796-cpg-mssr.c

+5 −0
Original line number Diff line number Diff line
@@ -150,6 +150,11 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { 
	DEF_MOD("fcpf0",		 615,	R8A7796_CLK_S0D1),

	DEF_MOD("fcpci0",		 617,	R8A7796_CLK_S0D2),

	DEF_MOD("fcpcs",		 619,	R8A7796_CLK_S0D2),

	DEF_MOD("vspd2",		 621,	R8A7796_CLK_S0D2),

	DEF_MOD("vspd1",		 622,	R8A7796_CLK_S0D2),

	DEF_MOD("vspd0",		 623,	R8A7796_CLK_S0D2),

	DEF_MOD("vspb",			 626,	R8A7796_CLK_S0D1),

	DEF_MOD("vspi0",		 631,	R8A7796_CLK_S0D1),

	DEF_MOD("etheravb",		 812,	R8A7796_CLK_S0D6),

	DEF_MOD("gpio7",		 905,	R8A7796_CLK_S3D4),

	DEF_MOD("gpio6",		 906,	R8A7796_CLK_S3D4),

CRA Git | Maintained and supported by SUSTech CRA and CCSE