Commit 88ba2811 authored Mar 23, 2016 by Toshi Kani Committed by Ingo Molnar Mar 29, 2016

x86/xen, pat: Remove PAT table init code from Xen



Xen supports PAT without MTRRs for its guests.  In order to
enable WC attribute, it was necessary for xen_start_kernel()
to call pat_init_cache_modes() to update PAT table before
starting guest kernel.

Now that the kernel initializes PAT table to the BIOS handoff
state when MTRR is disabled, this Xen-specific PAT init code
is no longer necessary.  Delete it from xen_start_kernel().

Also change __init_cache_modes() to a static function since
PAT table should not be tweaked by other modules.

Signed-off-by: Toshi Kani <toshi.kani@hpe.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Juergen Gross <jgross@suse.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Borislav Petkov <bp@suse.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Luis R. Rodriguez <mcgrof@suse.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Toshi Kani <toshi.kani@hp.com>
Cc: elliott@hpe.com
Cc: paul.gortmaker@windriver.com
Cc: xen-devel@lists.xenproject.org
Link: http://lkml.kernel.org/r/1458769323-24491-7-git-send-email-toshi.kani@hpe.com


Signed-off-by: Ingo Molnar <mingo@kernel.org>

parent ad025a73

arch/x86/include/asm/pat.h

+0 −1

Original line number	Diff line number	Diff line
		@@ -7,7 +7,6 @@
		bool pat_enabled(void);
		void pat_disable(const char *reason);
		extern void pat_init(void);
		void __init_cache_modes(u64);

		extern int reserve_memtype(u64 start, u64 end,
		enum page_cache_mode req_pcm, enum page_cache_mode *ret_pcm);

arch/x86/mm/pat.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -192,7 +192,7 @@ static enum page_cache_mode pat_get_cache_mode(unsigned pat_val, char *msg)
		* configuration.
		* Using lower indices is preferred, so we start with highest index.
		*/
		void __init_cache_modes(u64 pat)
		static void __init_cache_modes(u64 pat)
		{
		enum page_cache_mode cache;
		char pat_msg[33];

arch/x86/xen/enlighten.c

+0 −9

Original line number	Diff line number	Diff line
		@@ -75,7 +75,6 @@
		#include <asm/mach_traps.h>
		#include <asm/mwait.h>
		#include <asm/pci_x86.h>
		#include <asm/pat.h>
		#include <asm/cpu.h>

		#ifdef CONFIG_ACPI
		@@ -1511,7 +1510,6 @@ asmlinkage __visible void __init xen_start_kernel(void)
		{
		struct physdev_set_iopl set_iopl;
		unsigned long initrd_start = 0;
		u64 pat;
		int rc;

		if (!xen_start_info)
		@@ -1618,13 +1616,6 @@ asmlinkage __visible void __init xen_start_kernel(void)
		xen_start_info->nr_pages);
		xen_reserve_special_pages();

		/*
		* Modify the cache mode translation tables to match Xen's PAT
		* configuration.
		*/
		rdmsrl(MSR_IA32_CR_PAT, pat);
		__init_cache_modes(pat);

		/* keep using Xen gdt for now; no urgent need to change it */

		#ifdef CONFIG_X86_32

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