Commit 887803db authored Oct 24, 2019 by Yangyang Li Committed by Jason Gunthorpe Oct 28, 2019

RDMA/hns: Bugfix for qpc/cqc timer configuration

qpc/cqc timer entry size needs one page, but currently they are fixedly
configured to 4096, which is not appropriate in 64K page scenarios. So
they should be modified to PAGE_SIZE.

Fixes: 0e40dc2f ("RDMA/hns: Add timer allocation support for hip08")
Link: https://lore.kernel.org/r/1571908917-16220-3-git-send-email-liweihang@hisilicon.com


Signed-off-by: Yangyang Li <liyangyang20@huawei.com>
Signed-off-by: Weihang Li <liweihang@hisilicon.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>

parent 5c7e76fb

drivers/infiniband/hw/hns/hns_roce_hw_v2.h

+2 −2

Original line number	Diff line number	Diff line
		@@ -87,8 +87,8 @@
		#define HNS_ROCE_V2_MTT_ENTRY_SZ 64
		#define HNS_ROCE_V2_CQE_ENTRY_SIZE 32
		#define HNS_ROCE_V2_SCCC_ENTRY_SZ 32
		#define HNS_ROCE_V2_QPC_TIMER_ENTRY_SZ 4096
		#define HNS_ROCE_V2_CQC_TIMER_ENTRY_SZ 4096
		#define HNS_ROCE_V2_QPC_TIMER_ENTRY_SZ PAGE_SIZE
		#define HNS_ROCE_V2_CQC_TIMER_ENTRY_SZ PAGE_SIZE
		#define HNS_ROCE_V2_PAGE_SIZE_SUPPORTED 0xFFFFF000
		#define HNS_ROCE_V2_MAX_INNER_MTPT_NUM 2
		#define HNS_ROCE_INVALID_LKEY 0x100

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