Commit 885a8cfa authored by Hiroshi Doyu's avatar Hiroshi Doyu Committed by Stephen Warren
Browse files

ARM: tegra20: convert device tree files to use CLK defines 



Use the Tegra20 CAR binding header (tegra20-car.h) to replace magic
numbers in the device tree. For example,

-               clocks = <&tegra_car 28>;
+               clocks = <&tegra_car CLK_HOST1X>;

Signed-off-by: default avatarHiroshi Doyu <hdoyu@nvidia.com>
[swarren, updated since tegra20-car.h moved for consistency]
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 1a99ece9

arch/arm/boot/dts/tegra20-colibri-512.dtsi

+3 −1
Original line number Diff line number Diff line
@@ -492,7 +492,9 @@ 


		nvidia,ac97-controller = <&ac97>;



		clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;

		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,

			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,

			 <&tegra_car TEGRA20_CLK_CDEV1>;

		clock-names = "pll_a", "pll_a_out0", "mclk";

	};

arch/arm/boot/dts/tegra20-harmony.dts

+3 −1
Original line number Diff line number Diff line
@@ -702,7 +702,9 @@ 
		nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)

			GPIO_ACTIVE_HIGH>;



		clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;

		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,

			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,

			 <&tegra_car TEGRA20_CLK_CDEV1>;

		clock-names = "pll_a", "pll_a_out0", "mclk";

	};

};

arch/arm/boot/dts/tegra20-medcom-wide.dts

+3 −1
Original line number Diff line number Diff line
@@ -59,7 +59,9 @@ 
		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;

		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;



		clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;

		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,

			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,

			 <&tegra_car TEGRA20_CLK_CDEV1>;

		clock-names = "pll_a", "pll_a_out0", "mclk";

	};

};

arch/arm/boot/dts/tegra20-paz00.dts

+5 −2
Original line number Diff line number Diff line
@@ -277,7 +277,8 @@ 
		clock-frequency = <80000>;

		request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;

		slave-addr = <138>;

		clocks = <&tegra_car 67>, <&tegra_car 124>;

		clocks = <&tegra_car TEGRA20_CLK_I2C3>,

		       	 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;

		clock-names = "div-clk", "fast-clk";

	};
@@ -535,7 +536,9 @@ 
		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)

			GPIO_ACTIVE_HIGH>;



		clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;

		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,

		       	 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,

			 <&tegra_car TEGRA20_CLK_CDEV1>;

		clock-names = "pll_a", "pll_a_out0", "mclk";

	};

};

arch/arm/boot/dts/tegra20-plutux.dts

+3 −1
Original line number Diff line number Diff line
@@ -53,7 +53,9 @@ 
		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;

		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;



		clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;

		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,

			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,

			 <&tegra_car TEGRA20_CLK_CDEV1>;

		clock-names = "pll_a", "pll_a_out0", "mclk";

	};

};

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