Commit 878ba61a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC platform changes from Olof Johansson:
 "New and updated SoC support.  Also included are some cleanups where
  the platform maintainers hadn't separated cleanups from new developent
  in separate branches.

  Some of the larger things worth pointing out:

   - A large set of changes from Alexandre Belloni and Nicolas Ferre
     preparing at91 platforms for multiplatform and cleaning up quite a
     bit in the process.

   - Removal of CSR's "Marco" SoC platform that never made it out to the
     market.  We love seeing these since it means the vendor published
     support before product was out, which is exactly what we want!

  New platforms this release are:

   - Conexant Digicolor (CX92755 SoC)
   - Hisilicon HiP01 SoC
   - CSR/sirf Atlas7 SoC
   - ST STiH418 SoC
   - Common code changes for Nvidia Tegra132 (64-bit SoC)

  We're seeing more and more platforms having a harder time labelling
  changes as cleanups vs new development -- which is a good sign that
  we've come quite far on the cleanup effort.  So over time we might
  start combining the cleanup and new-development branches more"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (124 commits)
  ARM: at91/trivial: unify functions and machine names
  ARM: at91: remove at91_dt_initialize and machine init_early()
  ARM: at91: change board files into SoC files
  ARM: at91: remove at91_boot_soc
  ARM: at91: move alternative initial mapping to board-dt-sama5.c
  ARM: at91: merge all SOC_AT91SAM9xxx
  ARM: at91: at91rm9200: set idle and restart from rm9200_dt_device_init()
  ARM: digicolor: select syscon and timer
  ARM: zynq: Simplify SLCR initialization
  ARM: zynq: PM: Fixed simple typo.
  ARM: zynq: Setup default gpio number for Xilinx Zynq
  ARM: digicolor: add low level debug support
  ARM: initial support for Conexant Digicolor CX92755 SoC
  ARM: OMAP2+: Add dm816x hwmod support
  ARM: OMAP2+: Add clock domain support for dm816x
  ARM: OMAP2+: Add board-generic.c entry for ti81xx
  ARM: at91: pm: remove warning to remove SOC_AT91SAM9263 usage
  ARM: at91: remove unused mach/system_rev.h
  ARM: at91: stop using HAVE_AT91_DBGUx
  ARM: at91: fix ordering of SRAM and PM initialization
  ...
parents ea7531ac df1a6681

Documentation/arm/sti/stih418-overview.txt

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			STiH418 Overview

			================



Introduction

------------



    The STiH418 is the new generation of SoC for UHDp60 set-top boxes

    and server/connected client application for satellite, cable, terrestrial

    and IP-STB markets.



    Features

    - ARM Cortex-A9 1.5 GHz quad core CPU (28nm)

    - SATA2, USB 3.0, PCIe, Gbit Ethernet

    - HEVC L5.1 Main 10

    - VP9



  Document Author

  ---------------



  Maxime Coquelin <maxime.coquelin@st.com>, (c) 2015 ST Microelectronics

Documentation/arm/sunxi/README

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@@ -50,7 +50,6 @@ SunXi family 
          http://dl.linux-sunxi.org/A31/A3x_release_document/A31/IC/A31%20user%20manual%20V1.1%2020130630.pdf



      - Allwinner A31s (sun6i)

        + Not Supported

        + Datasheet

          http://dl.linux-sunxi.org/A31/A3x_release_document/A31s/IC/A31s%20datasheet%20V1.3%2020131106.pdf

        + User Manual

Documentation/devicetree/bindings/arm/atmel-at91.txt

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@@ -24,6 +24,7 @@ compatible: must be one of: 
    o "atmel,at91sam9g45"

    o "atmel,at91sam9n12"

    o "atmel,at91sam9rl"

    o "atmel,at91sam9xe"

 * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific

   SoC family:

    o "atmel,sama5d3" shall be extended with the specific SoC compatible:
@@ -136,3 +137,19 @@ Example: 
		compatible = "atmel,at91sam9260-rstc";

		reg = <0xfffffd00 0x10>;

	};



Special Function Registers (SFR)



Special Function Registers (SFR) manage specific aspects of the integrated

memory, bridge implementations, processor and other functionality not controlled

elsewhere.



required properties:

- compatible: Should be "atmel,<chip>-sfr", "syscon".

  <chip> can be "sama5d3" or "sama5d4".

- reg: Should contain registers location and length



	sfr@f0038000 {

		compatible = "atmel,sama5d3-sfr", "syscon";

		reg = <0xf0038000 0x60>;

	};

Documentation/devicetree/bindings/arm/fsl.txt

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@@ -75,6 +75,18 @@ i.MX6q generic board 
Required root node properties:

    - compatible = "fsl,imx6q";



Freescale Vybrid Platform Device Tree Bindings

----------------------------------------------



For the Vybrid SoC familiy all variants with DDR controller are supported,

which is the VF5xx and VF6xx series. Out of historical reasons, in most

places the kernel uses vf610 to refer to the whole familiy.



Required root node compatible property (one of them):

    - compatible = "fsl,vf500";

    - compatible = "fsl,vf510";

    - compatible = "fsl,vf600";

    - compatible = "fsl,vf610";



Freescale LS1021A Platform Device Tree Bindings

------------------------------------------------

Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt

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Rockchip SRAM for pmu:

------------------------------



The sram of pmu is used to store the function of resume from maskrom(the 1st

level loader). This is a common use of the "pmu-sram" because it keeps power

even in low power states in the system.



Required node properties:

- compatible : should be "rockchip,rk3288-pmu-sram"

- reg : physical base address and the size of the registers window



Example:

	sram@ff720000 {

		compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";

		reg = <0xff720000 0x1000>;

	};

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