Commit 8733a063 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin Committed by Chris Wilson
Browse files

drm/i915: Adjust the sentinel assert to match implementation 



Sentinels are supposed to be last requests in the elsp queue, not the
only one, so adjust the assert accordingly.

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200607222108.14401-1-chris@chris-wilson.co.uk


Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 46d53e27

drivers/gpu/drm/i915/gt/intel_lrc.c

+3 −11
Original line number Diff line number Diff line
@@ -1635,9 +1635,9 @@ assert_pending_valid(const struct intel_engine_execlists *execlists, 
		ccid = ce->lrc.ccid;



		/*

		 * Sentinels are supposed to be lonely so they flush the

		 * current exection off the HW. Check that they are the

		 * only request in the pending submission.

		 * Sentinels are supposed to be the last request so they flush

		 * the current execution off the HW. Check that they are the only

		 * request in the pending submission.

		 */

		if (sentinel) {

			GEM_TRACE_ERR("%s: context:%llx after sentinel in pending[%zd]\n",
@@ -1646,15 +1646,7 @@ assert_pending_valid(const struct intel_engine_execlists *execlists, 
				      port - execlists->pending);

			return false;

		}



		sentinel = i915_request_has_sentinel(rq);

		if (sentinel && port != execlists->pending) {

			GEM_TRACE_ERR("%s: sentinel context:%llx not in prime position[%zd]\n",

				      engine->name,

				      ce->timeline->fence_context,

				      port - execlists->pending);

			return false;

		}



		/* Hold tightly onto the lock to prevent concurrent retires! */

		if (!spin_trylock_irqsave(&rq->lock, flags))

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