arm64: dts: allwinner: a64: add R_I2C controller (871b5352) · Commits · 戴 / test

Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has two groups of pinmuxes on PL bank, so it's called R_I2C. Add support for this I2C controller and the pinmux which doesn't conflict with RSB. Signed-off-by:

Icenowy Zheng <icenowy@aosc.io> Signed-off-by:

Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by:

Maxime Ripard <maxime.ripard@bootlin.com>

arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi

+18 −0

Original line number	Diff line number	Diff line
		@@ -46,6 +46,7 @@
		#include <dt-bindings/clock/sun8i-r-ccu.h>
		#include <dt-bindings/interrupt-controller/arm-gic.h>
		#include <dt-bindings/reset/sun50i-a64-ccu.h>
		#include <dt-bindings/reset/sun8i-r-ccu.h>

		/ {
		interrupt-parent = <&gic>;
		@@ -658,6 +659,18 @@
		#reset-cells = <1>;
		};

		r_i2c: i2c@1f02400 {
		compatible = "allwinner,sun50i-a64-i2c",
		"allwinner,sun6i-a31-i2c";
		reg = <0x01f02400 0x400>;
		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&r_ccu CLK_APB0_I2C>;
		resets = <&r_ccu RST_APB0_I2C>;
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
		};

		r_pio: pinctrl@1f02c00 {
		compatible = "allwinner,sun50i-a64-r-pinctrl";
		reg = <0x01f02c00 0x400>;
		@@ -669,6 +682,11 @@
		interrupt-controller;
		#interrupt-cells = <3>;

		r_i2c_pins_a: i2c-a {
		pins = "PL8", "PL9";
		function = "s_i2c";
		};

		r_rsb_pins: rsb {
		pins = "PL0", "PL1";
		function = "s_rsb";

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