Commit 87093826 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull timer changes from Ingo Molnar:
 "Main changes in this cycle were:

   - Updated full dynticks support.

   - Event stream support for architected (ARM) timers.

   - ARM clocksource driver updates.

   - Move arm64 to using the generic sched_clock framework & resulting
     cleanup in the generic sched_clock code.

   - Misc fixes and cleanups"

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (50 commits)
  x86/time: Honor ACPI FADT flag indicating absence of a CMOS RTC
  clocksource: sun4i: remove IRQF_DISABLED
  clocksource: sun4i: Report the minimum tick that we can program
  clocksource: sun4i: Select CLKSRC_MMIO
  clocksource: Provide timekeeping for efm32 SoCs
  clocksource: em_sti: convert to clk_prepare/unprepare
  time: Fix signedness bug in sysfs_get_uname() and its callers
  timekeeping: Fix some trivial typos in comments
  alarmtimer: return EINVAL instead of ENOTSUPP if rtcdev doesn't exist
  clocksource: arch_timer: Do not register arch_sys_counter twice
  timer stats: Add a 'Collection: active/inactive' line to timer usage statistics
  sched_clock: Remove sched_clock_func() hook
  arch_timer: Move to generic sched_clock framework
  clocksource: tcb_clksrc: Remove IRQF_DISABLED
  clocksource: tcb_clksrc: Improve driver robustness
  clocksource: tcb_clksrc: Replace clk_enable/disable with clk_prepare_enable/disable_unprepare
  clocksource: arm_arch_timer: Use clocksource for suspend timekeeping
  clocksource: dw_apb_timer_of: Mark a few more functions as __init
  clocksource: Put nodes passed to CLOCKSOURCE_OF_DECLARE callbacks centrally
  arm: zynq: Enable arm_global_timer
  ...
parents 39cf275a ee5872be

Documentation/devicetree/bindings/timer/efm32,timer.txt

0 → 100644
+23 −0
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* EFM32 timer hardware



The efm32 Giant Gecko SoCs come with four 16 bit timers. Two counters can be

connected to form a 32 bit counter. Each timer has three Compare/Capture

channels and can be used as PWM or Quadrature Decoder. Available clock sources

are the cpu's HFPERCLK (with a 10-bit prescaler) or an external pin.



Required properties:

- compatible : Should be efm32,timer

- reg : Address and length of the register set

- clocks : Should contain a reference to the HFPERCLK



Optional properties:

- interrupts : Reference to the timer interrupt



Example:



timer@40010c00 {

	compatible = "efm32,timer";

	reg = <0x40010c00 0x400>;

	interrupts = <14>;

	clocks = <&cmu clk_HFPERCLKTIMER3>;

};

arch/Kconfig

+12 −0
Original line number Diff line number Diff line
@@ -353,6 +353,18 @@ config HAVE_CONTEXT_TRACKING 
config HAVE_VIRT_CPU_ACCOUNTING

	bool



config HAVE_VIRT_CPU_ACCOUNTING_GEN

	bool

	default y if 64BIT

	help

	  With VIRT_CPU_ACCOUNTING_GEN, cputime_t becomes 64-bit.

	  Before enabling this option, arch code must be audited

	  to ensure there are no races in concurrent read/write of

	  cputime_t. For example, reading/writing 64-bit cputime_t on

	  some 32-bit arches may require multiple accesses, so proper

	  locking is needed to protect against concurrent accesses.





config HAVE_IRQ_TIME_ACCOUNTING

	bool

	help

arch/arm/Kconfig

+1 −0
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@@ -54,6 +54,7 @@ config ARM 
	select HAVE_REGS_AND_STACK_ACCESS_API

	select HAVE_SYSCALL_TRACEPOINTS

	select HAVE_UID16

	select HAVE_VIRT_CPU_ACCOUNTING_GEN

	select IRQ_FORCED_THREADING

	select KTIME_SCALAR

	select MODULES_USE_ELF_REL

arch/arm/boot/dts/zynq-7000.dtsi

+8 −0
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@@ -92,6 +92,14 @@ 
			};

		};



		global_timer: timer@f8f00200 {

			compatible = "arm,cortex-a9-global-timer";

			reg = <0xf8f00200 0x20>;

			interrupts = <1 11 0x301>;

			interrupt-parent = <&intc>;

			clocks = <&clkc 4>;

		};



		ttc0: ttc0@f8001000 {

			interrupt-parent = <&intc>;

			interrupts = < 0 10 4 0 11 4 0 12 4 >;

arch/arm/include/asm/arch_timer.h

+31 −5
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@@ -87,17 +87,43 @@ static inline u64 arch_counter_get_cntvct(void) 
	return cval;

}



static inline void arch_counter_set_user_access(void)

static inline u32 arch_timer_get_cntkctl(void)

{

	u32 cntkctl;



	asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl));

	return cntkctl;

}



	/* disable user access to everything */

	cntkctl &= ~((3 << 8) | (7 << 0));



static inline void arch_timer_set_cntkctl(u32 cntkctl)

{

	asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl));

}



static inline void arch_counter_set_user_access(void)

{

	u32 cntkctl = arch_timer_get_cntkctl();



	/* Disable user access to both physical/virtual counters/timers */

	/* Also disable virtual event stream */

	cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN

			| ARCH_TIMER_USR_VT_ACCESS_EN

			| ARCH_TIMER_VIRT_EVT_EN

			| ARCH_TIMER_USR_VCT_ACCESS_EN

			| ARCH_TIMER_USR_PCT_ACCESS_EN);

	arch_timer_set_cntkctl(cntkctl);

}



static inline void arch_timer_evtstrm_enable(int divider)

{

	u32 cntkctl = arch_timer_get_cntkctl();

	cntkctl &= ~ARCH_TIMER_EVT_TRIGGER_MASK;

	/* Set the divider and enable virtual event stream */

	cntkctl |= (divider << ARCH_TIMER_EVT_TRIGGER_SHIFT)

			| ARCH_TIMER_VIRT_EVT_EN;

	arch_timer_set_cntkctl(cntkctl);

	elf_hwcap |= HWCAP_EVTSTRM;

}



#endif



#endif

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