Merge tag 'soc-attr-updates-5.9' of... (86aa1608) · Commits · 戴 / test

Documentation/ABI/testing/sysfs-devices-soc

+30 −0

Original line number	Diff line number	Diff line
		@@ -26,6 +26,30 @@ Description:
		Read-only attribute common to all SoCs. Contains SoC family name
		(e.g. DB8500).

		On many of ARM based silicon with SMCCC v1.2+ compliant firmware
		this will contain the JEDEC JEP106 manufacturer’s identification
		code. The format is "jep106:XXYY" where XX is identity code and
		YY is continuation code.

		This manufacturer’s identification code is defined by one
		or more eight (8) bit fields, each consisting of seven (7)
		data bits plus one (1) odd parity bit. It is a single field,
		limiting the possible number of vendors to 126. To expand
		the maximum number of identification codes, a continuation
		scheme has been defined.

		The specified mechanism is that an identity code of 0x7F
		represents the "continuation code" and implies the presence
		of an additional identity code field, and this mechanism
		may be extended to multiple continuation codes followed
		by the manufacturer's identity code.

		For example, ARM has identity code 0x7F 0x7F 0x7F 0x7F 0x3B,
		which is code 0x3B on the fifth 'page'. This is shortened
		as JEP106 identity code of 0x3B and a continuation code of
		0x4 to represent the four continuation codes preceding the
		identity code.

		What: /sys/devices/socX/serial_number
		Date: January 2019
		contact: Bjorn Andersson <bjorn.andersson@linaro.org>
		@@ -40,6 +64,12 @@ Description:
		Read-only attribute supported by most SoCs. In the case of
		ST-Ericsson's chips this contains the SoC serial number.

		On many of ARM based silicon with SMCCC v1.2+ compliant firmware
		this will contain the SOC ID appended to the family attribute
		to ensure there is no conflict in this namespace across various
		vendors. The format is "jep106:XXYY:ZZZZ" where XX is identity
		code, YY is continuation code and ZZZZ is the SOC ID.

		What: /sys/devices/socX/revision
		Date: January 2012
		contact: Lee Jones <lee.jones@linaro.org>

arch/arm/mach-omap2/id.c

+11 −9

Original line number	Diff line number	Diff line
		@@ -775,19 +775,23 @@ static const char * __init omap_get_family(void)
		return kasprintf(GFP_KERNEL, "Unknown");
		}

		static ssize_t omap_get_type(struct device *dev,
		struct device_attribute *attr,
		char *buf)
		static ssize_t
		type_show(struct device dev, struct device_attribute attr, char *buf)
		{
		return sprintf(buf, "%s\n", omap_types[omap_type()]);
		}

		static struct device_attribute omap_soc_attr =
		__ATTR(type, S_IRUGO, omap_get_type, NULL);
		static DEVICE_ATTR_RO(type);

		static struct attribute *omap_soc_attrs[] = {
		&dev_attr_type.attr,
		NULL
		};

		ATTRIBUTE_GROUPS(omap_soc);

		void __init omap_soc_device_init(void)
		{
		struct device *parent;
		struct soc_device *soc_dev;
		struct soc_device_attribute *soc_dev_attr;

		@@ -798,14 +802,12 @@ void __init omap_soc_device_init(void)
		soc_dev_attr->machine = soc_name;
		soc_dev_attr->family = omap_get_family();
		soc_dev_attr->revision = soc_rev;
		soc_dev_attr->custom_attr_group = omap_soc_groups[0];

		soc_dev = soc_device_register(soc_dev_attr);
		if (IS_ERR(soc_dev)) {
		kfree(soc_dev_attr);
		return;
		}

		parent = soc_device_to_device(soc_dev);
		device_create_file(parent, &omap_soc_attr);
		}
		#endif /* CONFIG_SOC_BUS */

drivers/firmware/smccc/Kconfig

+9 −0

Original line number	Diff line number	Diff line
		@@ -14,3 +14,12 @@ config HAVE_ARM_SMCCC_DISCOVERY
		to add SMCCC discovery mechanism though the PSCI firmware
		implementation of PSCI_FEATURES(SMCCC_VERSION) which returns
		success on firmware compliant to SMCCC v1.1 and above.

		config ARM_SMCCC_SOC_ID
		bool "SoC bus device for the ARM SMCCC SOC_ID"
		depends on HAVE_ARM_SMCCC_DISCOVERY
		default y
		select SOC_BUS
		help
		Include support for the SoC bus on the ARM SMCCC firmware based
		platforms providing some sysfs information about the SoC variant.

drivers/firmware/smccc/Makefile

+1 −0

Original line number	Diff line number	Diff line
		# SPDX-License-Identifier: GPL-2.0
		#
		obj-$(CONFIG_HAVE_ARM_SMCCC_DISCOVERY) += smccc.o
		obj-$(CONFIG_ARM_SMCCC_SOC_ID) += soc_id.o

drivers/firmware/smccc/soc_id.c

0 → 100644

+114 −0

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0
		/*
		* Copyright 2020 Arm Limited
		*/

		#define pr_fmt(fmt) "SMCCC: SOC_ID: " fmt

		#include <linux/arm-smccc.h>
		#include <linux/bitfield.h>
		#include <linux/device.h>
		#include <linux/module.h>
		#include <linux/kernel.h>
		#include <linux/slab.h>
		#include <linux/sys_soc.h>

		#define SMCCC_SOC_ID_JEP106_BANK_IDX_MASK GENMASK(30, 24)
		/*
		* As per the SMC Calling Convention specification v1.2 (ARM DEN 0028C)
		* Section 7.4 SMCCC_ARCH_SOC_ID bits[23:16] are JEP-106 identification
		* code with parity bit for the SiP. We can drop the parity bit.
		*/
		#define SMCCC_SOC_ID_JEP106_ID_CODE_MASK GENMASK(22, 16)
		#define SMCCC_SOC_ID_IMP_DEF_SOC_ID_MASK GENMASK(15, 0)

		#define JEP106_BANK_CONT_CODE(x) \
		(u8)(FIELD_GET(SMCCC_SOC_ID_JEP106_BANK_IDX_MASK, (x)))
		#define JEP106_ID_CODE(x) \
		(u8)(FIELD_GET(SMCCC_SOC_ID_JEP106_ID_CODE_MASK, (x)))
		#define IMP_DEF_SOC_ID(x) \
		(u16)(FIELD_GET(SMCCC_SOC_ID_IMP_DEF_SOC_ID_MASK, (x)))

		static struct soc_device *soc_dev;
		static struct soc_device_attribute *soc_dev_attr;

		static int __init smccc_soc_init(void)
		{
		struct arm_smccc_res res;
		int soc_id_rev, soc_id_version;
		static char soc_id_str[20], soc_id_rev_str[12];
		static char soc_id_jep106_id_str[12];

		if (arm_smccc_get_version() < ARM_SMCCC_VERSION_1_2)
		return 0;

		if (arm_smccc_1_1_get_conduit() == SMCCC_CONDUIT_NONE) {
		pr_err("%s: invalid SMCCC conduit\n", __func__);
		return -EOPNOTSUPP;
		}

		arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
		ARM_SMCCC_ARCH_SOC_ID, &res);

		if (res.a0 == SMCCC_RET_NOT_SUPPORTED) {
		pr_info("ARCH_SOC_ID not implemented, skipping ....\n");
		return 0;
		}

		if ((int)res.a0 < 0) {
		pr_info("ARCH_FEATURES(ARCH_SOC_ID) returned error: %lx\n",
		res.a0);
		return -EINVAL;
		}

		arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_SOC_ID, 0, &res);
		if ((int)res.a0 < 0) {
		pr_err("ARCH_SOC_ID(0) returned error: %lx\n", res.a0);
		return -EINVAL;
		}

		soc_id_version = res.a0;

		arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_SOC_ID, 1, &res);
		if ((int)res.a0 < 0) {
		pr_err("ARCH_SOC_ID(1) returned error: %lx\n", res.a0);
		return -EINVAL;
		}

		soc_id_rev = res.a0;

		soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
		if (!soc_dev_attr)
		return -ENOMEM;

		sprintf(soc_id_rev_str, "0x%08x", soc_id_rev);
		sprintf(soc_id_jep106_id_str, "jep106:%02x%02x",
		JEP106_BANK_CONT_CODE(soc_id_version),
		JEP106_ID_CODE(soc_id_version));
		sprintf(soc_id_str, "%s:%04x", soc_id_jep106_id_str,
		IMP_DEF_SOC_ID(soc_id_version));

		soc_dev_attr->soc_id = soc_id_str;
		soc_dev_attr->revision = soc_id_rev_str;
		soc_dev_attr->family = soc_id_jep106_id_str;

		soc_dev = soc_device_register(soc_dev_attr);
		if (IS_ERR(soc_dev)) {
		kfree(soc_dev_attr);
		return PTR_ERR(soc_dev);
		}

		pr_info("ID = %s Revision = %s\n", soc_dev_attr->soc_id,
		soc_dev_attr->revision);

		return 0;
		}
		module_init(smccc_soc_init);

		static void __exit smccc_soc_exit(void)
		{
		if (soc_dev)
		soc_device_unregister(soc_dev);
		kfree(soc_dev_attr);
		}
		module_exit(smccc_soc_exit);

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