Commit 8678c71c authored by Angelo Dureghello's avatar Angelo Dureghello Committed by Vinod Koul
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dmaengine: fsl-edma: fix wrong tcd endianness for big-endian cpu 



Due to recent fixes in m68k arch-specific I/O accessor macros, this
driver is not working anymore for ColdFire. Fix wrong tcd endianness
removing additional swaps, since edma_writex() functions should already
take care of any eventual swap if needed.

Note, i could only test the change in ColdFire mcf54415 and Vybrid
vf50 / Colibri where i don't see any issue. So, every feedback and
test for all other SoCs involved is really appreciated.

Signed-off-by: default avatarAngelo Dureghello <angelo.dureghello@timesys.com>
Reported-by: default avatarkbuild test robot <lkp@intel.com>
Link: https://lore.kernel.org/r/20200701225205.1674463-1-angelo.dureghello@timesys.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent fd17d1ab

drivers/dma/fsl-edma-common.c

+14 −12
Original line number Diff line number Diff line
@@ -352,26 +352,28 @@ static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, 
	/*

	 * TCD parameters are stored in struct fsl_edma_hw_tcd in little

	 * endian format. However, we need to load the TCD registers in

	 * big- or little-endian obeying the eDMA engine model endian.

	 * big- or little-endian obeying the eDMA engine model endian,

	 * and this is performed from specific edma_write functions

	 */

	edma_writew(edma, 0,  &regs->tcd[ch].csr);

	edma_writel(edma, le32_to_cpu(tcd->saddr), &regs->tcd[ch].saddr);

	edma_writel(edma, le32_to_cpu(tcd->daddr), &regs->tcd[ch].daddr);



	edma_writew(edma, le16_to_cpu(tcd->attr), &regs->tcd[ch].attr);

	edma_writew(edma, le16_to_cpu(tcd->soff), &regs->tcd[ch].soff);

	edma_writel(edma, (s32)tcd->saddr, &regs->tcd[ch].saddr);

	edma_writel(edma, (s32)tcd->daddr, &regs->tcd[ch].daddr);



	edma_writel(edma, le32_to_cpu(tcd->nbytes), &regs->tcd[ch].nbytes);

	edma_writel(edma, le32_to_cpu(tcd->slast), &regs->tcd[ch].slast);

	edma_writew(edma, (s16)tcd->attr, &regs->tcd[ch].attr);

	edma_writew(edma, tcd->soff, &regs->tcd[ch].soff);



	edma_writew(edma, le16_to_cpu(tcd->citer), &regs->tcd[ch].citer);

	edma_writew(edma, le16_to_cpu(tcd->biter), &regs->tcd[ch].biter);

	edma_writew(edma, le16_to_cpu(tcd->doff), &regs->tcd[ch].doff);

	edma_writel(edma, (s32)tcd->nbytes, &regs->tcd[ch].nbytes);

	edma_writel(edma, (s32)tcd->slast, &regs->tcd[ch].slast);



	edma_writel(edma, le32_to_cpu(tcd->dlast_sga),

	edma_writew(edma, (s16)tcd->citer, &regs->tcd[ch].citer);

	edma_writew(edma, (s16)tcd->biter, &regs->tcd[ch].biter);

	edma_writew(edma, (s16)tcd->doff, &regs->tcd[ch].doff);



	edma_writel(edma, (s32)tcd->dlast_sga,

			&regs->tcd[ch].dlast_sga);



	edma_writew(edma, le16_to_cpu(tcd->csr), &regs->tcd[ch].csr);

	edma_writew(edma, (s16)tcd->csr, &regs->tcd[ch].csr);

}



static inline

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