Commit 864ebdf0 authored Mar 25, 2017 by Icenowy Zheng Committed by Kishon Vijay Abraham I Apr 10, 2017

phy: sun4i-usb: add PHYCTL offset for H3 SoC



The config structure of H3 in phy-sun4i-usb driver have the PHYCTL
register offset missing.

Add it. From the BSP source code, we know that the offset should be
0x10.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

parent d699c1d0

drivers/phy/phy-sun4i-usb.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -821,6 +821,7 @@ static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
		.num_phys = 4,
		.type = sun8i_h3_phy,
		.disc_thresh = 3,
		.phyctl_offset = REG_PHYCTL_A33,
		.dedicated_clocks = true,
		.enable_pmu_unk1 = true,
		};

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