Commit 863da955 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus 

* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus:
  MIPS: Set io_map_base for several PCI bridges lacking it
  MIPS: Alchemy: Define eth platform devices in the correct order
  MIPS: BCM63xx: Prevent second enet registration on BCM6338
  MIPS: Quit using undefined behavior of ADDU in 64-bit atomic operations.
  MIPS: N32: Define getdents64.
  MIPS: MTX-1: Fix PCI on the MeshCube and related boards
  MIPS: Make init_vdso a subsys_initcall.
  MIPS: "Fix" useless 'init_vdso successfully' message.
  MIPS: PowerTV: Move register setup to before reading registers.
  SOUND: Au1000: Fix section mismatch
  VIDEO: Au1100fb: Fix section mismatch
  VIDEO: PMAGB-B: Fix section mismatch
  VIDEO: PMAG-BA: Fix section mismatch
  NET: declance: Fix section mismatches
  VIDEO. gbefb: Fix section mismatches.
parents 5620ae29 8faf2e6c

arch/mips/alchemy/common/platform.c

+5 −4
Original line number Original line Diff line number Diff line
@@ -435,20 +435,21 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = { 
static int __init au1xxx_platform_init(void)

static int __init au1xxx_platform_init(void)

{

{

	unsigned int uartclk = get_au1x00_uart_baud_base() * 16;

	unsigned int uartclk = get_au1x00_uart_baud_base() * 16;

	int i;

	int err, i;





	/* Fill up uartclk. */

	/* Fill up uartclk. */

	for (i = 0; au1x00_uart_data[i].flags; i++)

	for (i = 0; au1x00_uart_data[i].flags; i++)

		au1x00_uart_data[i].uartclk = uartclk;

		au1x00_uart_data[i].uartclk = uartclk;





	err = platform_add_devices(au1xxx_platform_devices,

				   ARRAY_SIZE(au1xxx_platform_devices));

#ifndef CONFIG_SOC_AU1100

#ifndef CONFIG_SOC_AU1100

	/* Register second MAC if enabled in pinfunc */

	/* Register second MAC if enabled in pinfunc */

	if (!(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2))

	if (!err && !(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2))

		platform_device_register(&au1xxx_eth1_device);

		platform_device_register(&au1xxx_eth1_device);

#endif

#endif





	return platform_add_devices(au1xxx_platform_devices,

	return err;

				    ARRAY_SIZE(au1xxx_platform_devices));

}

}





arch_initcall(au1xxx_platform_init);
 
arch_initcall(au1xxx_platform_init);

arch/mips/alchemy/mtx-1/board_setup.c

+3 −5
Original line number Original line Diff line number Diff line
@@ -67,8 +67,6 @@ static void mtx1_power_off(void) 




void __init board_setup(void)

void __init board_setup(void)

{

{

	alchemy_gpio2_enable();



#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)

#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)

	/* Enable USB power switch */

	/* Enable USB power switch */

	alchemy_gpio_direction_output(204, 0);

	alchemy_gpio_direction_output(204, 0);
@@ -117,11 +115,11 @@ mtx1_pci_idsel(unsigned int devsel, int assert) 




	if (assert && devsel != 0)

	if (assert && devsel != 0)

		/* Suppress signal to Cardbus */

		/* Suppress signal to Cardbus */

		gpio_set_value(1, 0);	/* set EXT_IO3 OFF */

		alchemy_gpio_set_value(1, 0);	/* set EXT_IO3 OFF */

	else

	else

		gpio_set_value(1, 1);	/* set EXT_IO3 ON */

		alchemy_gpio_set_value(1, 1);	/* set EXT_IO3 ON */





	au_sync_udelay(1);

	udelay(1);

	return 1;

	return 1;

}

}

arch/mips/bcm63xx/dev-enet.c

+3 −0
Original line number Original line Diff line number Diff line
@@ -104,6 +104,9 @@ int __init bcm63xx_enet_register(int unit, 
	if (unit > 1)

	if (unit > 1)

		return -ENODEV;

		return -ENODEV;





	if (unit == 1 && BCMCPU_IS_6338())

		return -ENODEV;



	if (!shared_device_registered) {

	if (!shared_device_registered) {

		shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);

		shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);

		shared_res[0].end = shared_res[0].start;

		shared_res[0].end = shared_res[0].start;

arch/mips/include/asm/atomic.h

+12 −12
Original line number Original line Diff line number Diff line
@@ -434,7 +434,7 @@ static __inline__ void atomic64_add(long i, atomic64_t * v) 
		__asm__ __volatile__(

		__asm__ __volatile__(

		"	.set	mips3					\n"

		"	.set	mips3					\n"

		"1:	lld	%0, %1		# atomic64_add		\n"

		"1:	lld	%0, %1		# atomic64_add		\n"

		"	addu	%0, %2					\n"

		"	daddu	%0, %2					\n"

		"	scd	%0, %1					\n"

		"	scd	%0, %1					\n"

		"	beqzl	%0, 1b					\n"

		"	beqzl	%0, 1b					\n"

		"	.set	mips0					\n"

		"	.set	mips0					\n"
@@ -446,7 +446,7 @@ static __inline__ void atomic64_add(long i, atomic64_t * v) 
		__asm__ __volatile__(

		__asm__ __volatile__(

		"	.set	mips3					\n"

		"	.set	mips3					\n"

		"1:	lld	%0, %1		# atomic64_add		\n"

		"1:	lld	%0, %1		# atomic64_add		\n"

		"	addu	%0, %2					\n"

		"	daddu	%0, %2					\n"

		"	scd	%0, %1					\n"

		"	scd	%0, %1					\n"

		"	beqz	%0, 2f					\n"

		"	beqz	%0, 2f					\n"

		"	.subsection 2					\n"

		"	.subsection 2					\n"
@@ -479,7 +479,7 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v) 
		__asm__ __volatile__(

		__asm__ __volatile__(

		"	.set	mips3					\n"

		"	.set	mips3					\n"

		"1:	lld	%0, %1		# atomic64_sub		\n"

		"1:	lld	%0, %1		# atomic64_sub		\n"

		"	subu	%0, %2					\n"

		"	dsubu	%0, %2					\n"

		"	scd	%0, %1					\n"

		"	scd	%0, %1					\n"

		"	beqzl	%0, 1b					\n"

		"	beqzl	%0, 1b					\n"

		"	.set	mips0					\n"

		"	.set	mips0					\n"
@@ -491,7 +491,7 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v) 
		__asm__ __volatile__(

		__asm__ __volatile__(

		"	.set	mips3					\n"

		"	.set	mips3					\n"

		"1:	lld	%0, %1		# atomic64_sub		\n"

		"1:	lld	%0, %1		# atomic64_sub		\n"

		"	subu	%0, %2					\n"

		"	dsubu	%0, %2					\n"

		"	scd	%0, %1					\n"

		"	scd	%0, %1					\n"

		"	beqz	%0, 2f					\n"

		"	beqz	%0, 2f					\n"

		"	.subsection 2					\n"

		"	.subsection 2					\n"
@@ -524,10 +524,10 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v) 
		__asm__ __volatile__(

		__asm__ __volatile__(

		"	.set	mips3					\n"

		"	.set	mips3					\n"

		"1:	lld	%1, %2		# atomic64_add_return	\n"

		"1:	lld	%1, %2		# atomic64_add_return	\n"

		"	addu	%0, %1, %3				\n"

		"	daddu	%0, %1, %3				\n"

		"	scd	%0, %2					\n"

		"	scd	%0, %2					\n"

		"	beqzl	%0, 1b					\n"

		"	beqzl	%0, 1b					\n"

		"	addu	%0, %1, %3				\n"

		"	daddu	%0, %1, %3				\n"

		"	.set	mips0					\n"

		"	.set	mips0					\n"

		: "=&r" (result), "=&r" (temp), "=m" (v->counter)

		: "=&r" (result), "=&r" (temp), "=m" (v->counter)

		: "Ir" (i), "m" (v->counter)

		: "Ir" (i), "m" (v->counter)
@@ -538,10 +538,10 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v) 
		__asm__ __volatile__(

		__asm__ __volatile__(

		"	.set	mips3					\n"

		"	.set	mips3					\n"

		"1:	lld	%1, %2		# atomic64_add_return	\n"

		"1:	lld	%1, %2		# atomic64_add_return	\n"

		"	addu	%0, %1, %3				\n"

		"	daddu	%0, %1, %3				\n"

		"	scd	%0, %2					\n"

		"	scd	%0, %2					\n"

		"	beqz	%0, 2f					\n"

		"	beqz	%0, 2f					\n"

		"	addu	%0, %1, %3				\n"

		"	daddu	%0, %1, %3				\n"

		"	.subsection 2					\n"

		"	.subsection 2					\n"

		"2:	b	1b					\n"

		"2:	b	1b					\n"

		"	.previous					\n"

		"	.previous					\n"
@@ -576,10 +576,10 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) 
		__asm__ __volatile__(

		__asm__ __volatile__(

		"	.set	mips3					\n"

		"	.set	mips3					\n"

		"1:	lld	%1, %2		# atomic64_sub_return	\n"

		"1:	lld	%1, %2		# atomic64_sub_return	\n"

		"	subu	%0, %1, %3				\n"

		"	dsubu	%0, %1, %3				\n"

		"	scd	%0, %2					\n"

		"	scd	%0, %2					\n"

		"	beqzl	%0, 1b					\n"

		"	beqzl	%0, 1b					\n"

		"	subu	%0, %1, %3				\n"

		"	dsubu	%0, %1, %3				\n"

		"	.set	mips0					\n"

		"	.set	mips0					\n"

		: "=&r" (result), "=&r" (temp), "=m" (v->counter)

		: "=&r" (result), "=&r" (temp), "=m" (v->counter)

		: "Ir" (i), "m" (v->counter)

		: "Ir" (i), "m" (v->counter)
@@ -590,10 +590,10 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) 
		__asm__ __volatile__(

		__asm__ __volatile__(

		"	.set	mips3					\n"

		"	.set	mips3					\n"

		"1:	lld	%1, %2		# atomic64_sub_return	\n"

		"1:	lld	%1, %2		# atomic64_sub_return	\n"

		"	subu	%0, %1, %3				\n"

		"	dsubu	%0, %1, %3				\n"

		"	scd	%0, %2					\n"

		"	scd	%0, %2					\n"

		"	beqz	%0, 2f					\n"

		"	beqz	%0, 2f					\n"

		"	subu	%0, %1, %3				\n"

		"	dsubu	%0, %1, %3				\n"

		"	.subsection 2					\n"

		"	.subsection 2					\n"

		"2:	b	1b					\n"

		"2:	b	1b					\n"

		"	.previous					\n"

		"	.previous					\n"

arch/mips/include/asm/unistd.h

+3 −2
Original line number Original line Diff line number Diff line
@@ -984,16 +984,17 @@ 
#define __NR_perf_event_open		(__NR_Linux + 296)

#define __NR_perf_event_open		(__NR_Linux + 296)

#define __NR_accept4			(__NR_Linux + 297)

#define __NR_accept4			(__NR_Linux + 297)

#define __NR_recvmmsg			(__NR_Linux + 298)

#define __NR_recvmmsg			(__NR_Linux + 298)

#define __NR_getdents64			(__NR_Linux + 299)





/*

/*

 * Offset of the last N32 flavoured syscall

 * Offset of the last N32 flavoured syscall

 */

 */

#define __NR_Linux_syscalls		298

#define __NR_Linux_syscalls		299





#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */

#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */





#define __NR_N32_Linux			6000

#define __NR_N32_Linux			6000

#define __NR_N32_Linux_syscalls		298

#define __NR_N32_Linux_syscalls		299





#ifdef __KERNEL__

#ifdef __KERNEL__

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