Commit 8625b221 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Parametrize BXT_DE_PORT_HP_DDI with hpd_pin 



Use hpd_pin to parametrize BXT_DE_PORT_HP_DDI() to make it clear
these have nothing to do with DDI ports or PHYs as such. The only
thing that matters is the HPD pin assignment.

v2: Remember the gvt

Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-8-ville.syrjala@linux.intel.com
parent 580bf195

drivers/gpu/drm/i915/gvt/display.c

+7 −6
Original line number Diff line number Diff line
@@ -173,23 +173,24 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) 
	int pipe;



	if (IS_BROXTON(dev_priv)) {

		vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &= ~(BXT_DE_PORT_HP_DDIA |

			BXT_DE_PORT_HP_DDIB |

			BXT_DE_PORT_HP_DDIC);

		vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &=

			~(BXT_DE_PORT_HP_DDI(HPD_PORT_A) |

			  BXT_DE_PORT_HP_DDI(HPD_PORT_B) |

			  BXT_DE_PORT_HP_DDI(HPD_PORT_C));



		if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) {

			vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=

				BXT_DE_PORT_HP_DDIA;

				BXT_DE_PORT_HP_DDI(HPD_PORT_A);

		}



		if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) {

			vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=

				BXT_DE_PORT_HP_DDIB;

				BXT_DE_PORT_HP_DDI(HPD_PORT_B);

		}



		if (intel_vgpu_has_monitor_on_port(vgpu, PORT_C)) {

			vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=

				BXT_DE_PORT_HP_DDIC;

				BXT_DE_PORT_HP_DDI(HPD_PORT_C);

		}



		return;

drivers/gpu/drm/i915/i915_irq.c

+6 −6
Original line number Diff line number Diff line
@@ -126,9 +126,9 @@ static const u32 hpd_status_i915[HPD_NUM_PINS] = { 
};



static const u32 hpd_bxt[HPD_NUM_PINS] = {

	[HPD_PORT_A] = BXT_DE_PORT_HP_DDIA,

	[HPD_PORT_B] = BXT_DE_PORT_HP_DDIB,

	[HPD_PORT_C] = BXT_DE_PORT_HP_DDIC,

	[HPD_PORT_A] = BXT_DE_PORT_HP_DDI(HPD_PORT_A),

	[HPD_PORT_B] = BXT_DE_PORT_HP_DDI(HPD_PORT_B),

	[HPD_PORT_C] = BXT_DE_PORT_HP_DDI(HPD_PORT_C),

};



static const u32 hpd_gen11[HPD_NUM_PINS] = {
@@ -3420,13 +3420,13 @@ static void __bxt_hpd_detection_setup(struct drm_i915_private *dev_priv, 
	 * For BXT invert bit has to be set based on AOB design

	 * for HPD detection logic, update it based on VBT fields.

	 */

	if ((enabled_irqs & BXT_DE_PORT_HP_DDIA) &&

	if ((enabled_irqs & BXT_DE_PORT_HP_DDI(HPD_PORT_A)) &&

	    intel_bios_is_port_hpd_inverted(dev_priv, PORT_A))

		hotplug |= BXT_DDIA_HPD_INVERT;

	if ((enabled_irqs & BXT_DE_PORT_HP_DDIB) &&

	if ((enabled_irqs & BXT_DE_PORT_HP_DDI(HPD_PORT_B)) &&

	    intel_bios_is_port_hpd_inverted(dev_priv, PORT_B))

		hotplug |= BXT_DDIB_HPD_INVERT;

	if ((enabled_irqs & BXT_DE_PORT_HP_DDIC) &&

	if ((enabled_irqs & BXT_DE_PORT_HP_DDI(HPD_PORT_C)) &&

	    intel_bios_is_port_hpd_inverted(dev_priv, PORT_C))

		hotplug |= BXT_DDIC_HPD_INVERT;

drivers/gpu/drm/i915/i915_reg.h

+6 −6
Original line number Diff line number Diff line
@@ -7813,6 +7813,8 @@ enum { 
	(GEN9_DE_PIPE_IRQ_FAULT_ERRORS | \

	 GEN11_PIPE_PLANE5_FAULT)



#define _HPD_PIN_DDI(hpd_pin)	((hpd_pin) - HPD_PORT_A)



#define GEN8_DE_PORT_ISR _MMIO(0x44440)

#define GEN8_DE_PORT_IMR _MMIO(0x44444)

#define GEN8_DE_PORT_IIR _MMIO(0x44448)
@@ -7826,12 +7828,10 @@ enum { 
#define  GEN9_AUX_CHANNEL_B		(1 << 25)

#define  DSI1_TE			(1 << 24)

#define  DSI0_TE			(1 << 23)

#define  BXT_DE_PORT_HP_DDIC		(1 << 5)

#define  BXT_DE_PORT_HP_DDIB		(1 << 4)

#define  BXT_DE_PORT_HP_DDIA		(1 << 3)

#define  BXT_DE_PORT_HOTPLUG_MASK	(BXT_DE_PORT_HP_DDIA | \

					 BXT_DE_PORT_HP_DDIB | \

					 BXT_DE_PORT_HP_DDIC)

#define  BXT_DE_PORT_HP_DDI(hpd_pin)	REG_BIT(3 + _HPD_PIN_DDI(hpd_pin))

#define  BXT_DE_PORT_HOTPLUG_MASK	(BXT_DE_PORT_HP_DDI(HPD_PORT_A) | \

					 BXT_DE_PORT_HP_DDI(HPD_PORT_B) | \

					 BXT_DE_PORT_HP_DDI(HPD_PORT_C))

#define  GEN8_PORT_DP_A_HOTPLUG		(1 << 3)

#define  BXT_DE_PORT_GMBUS		(1 << 1)

#define  GEN8_AUX_CHANNEL_A		(1 << 0)

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