Commit 85e69ad7 authored by Christoffer Dall's avatar Christoffer Dall
Browse files

KVM: arm/arm64: Move timer IRQ default init to arch_timer.c 



We currently initialize the arch timer IRQ numbers from the reset code,
presumably because we once intended to model multiple CPU or SoC types
from within the kernel and have hard-coded reset values in the reset
code.

As we are moving towards userspace being in charge of more fine-grained
CPU emulation and stitching together the pieces needed to emulate a
particular type of CPU, we should no longer have a tight coupling
between resetting a VCPU and setting IRQ numbers.

Therefore, move the logic to define and use the default IRQ numbers to
the timer code and set the IRQ number immediately when creating the
VCPU.

Signed-off-by: default avatarChristoffer Dall <cdall@linaro.org>
Reviewed-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
parent 3cba4af3

arch/arm/kvm/reset.c

+1 −15
Original line number Diff line number Diff line
@@ -37,16 +37,6 @@ static struct kvm_regs cortexa_regs_reset = { 
	.usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT,

};



static const struct kvm_irq_level cortexa_ptimer_irq = {

	{ .irq = 30 },

	.level = 1,

};



static const struct kvm_irq_level cortexa_vtimer_irq = {

	{ .irq = 27 },

	.level = 1,

};





/*******************************************************************************

 * Exported reset function
@@ -62,16 +52,12 @@ static const struct kvm_irq_level cortexa_vtimer_irq = { 
int kvm_reset_vcpu(struct kvm_vcpu *vcpu)

{

	struct kvm_regs *reset_regs;

	const struct kvm_irq_level *cpu_vtimer_irq;

	const struct kvm_irq_level *cpu_ptimer_irq;



	switch (vcpu->arch.target) {

	case KVM_ARM_TARGET_CORTEX_A7:

	case KVM_ARM_TARGET_CORTEX_A15:

		reset_regs = &cortexa_regs_reset;

		vcpu->arch.midr = read_cpuid_id();

		cpu_vtimer_irq = &cortexa_vtimer_irq;

		cpu_ptimer_irq = &cortexa_ptimer_irq;

		break;

	default:

		return -ENODEV;
@@ -84,5 +70,5 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) 
	kvm_reset_coprocs(vcpu);



	/* Reset arch_timer context */

	return kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq, cpu_ptimer_irq);

	return kvm_timer_vcpu_reset(vcpu);

}

arch/arm64/kvm/reset.c

+1 −15
Original line number Diff line number Diff line
@@ -46,16 +46,6 @@ static const struct kvm_regs default_regs_reset32 = { 
			COMPAT_PSR_I_BIT | COMPAT_PSR_F_BIT),

};



static const struct kvm_irq_level default_ptimer_irq = {

	.irq	= 30,

	.level	= 1,

};



static const struct kvm_irq_level default_vtimer_irq = {

	.irq	= 27,

	.level	= 1,

};



static bool cpu_has_32bit_el1(void)

{

	u64 pfr0;
@@ -108,8 +98,6 @@ int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext) 
 */

int kvm_reset_vcpu(struct kvm_vcpu *vcpu)

{

	const struct kvm_irq_level *cpu_vtimer_irq;

	const struct kvm_irq_level *cpu_ptimer_irq;

	const struct kvm_regs *cpu_reset;



	switch (vcpu->arch.target) {
@@ -122,8 +110,6 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) 
			cpu_reset = &default_regs_reset;

		}



		cpu_vtimer_irq = &default_vtimer_irq;

		cpu_ptimer_irq = &default_ptimer_irq;

		break;

	}
@@ -137,5 +123,5 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) 
	kvm_pmu_vcpu_reset(vcpu);



	/* Reset timer */

	return kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq, cpu_ptimer_irq);

	return kvm_timer_vcpu_reset(vcpu);

}

include/kvm/arm_arch_timer.h

+1 −3
Original line number Diff line number Diff line
@@ -57,9 +57,7 @@ struct arch_timer_cpu { 


int kvm_timer_hyp_init(void);

int kvm_timer_enable(struct kvm_vcpu *vcpu);

int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,

			 const struct kvm_irq_level *virt_irq,

			 const struct kvm_irq_level *phys_irq);

int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu);

void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu);

void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu);

void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu);

virt/kvm/arm/arch_timer.c

+16 −12
Original line number Diff line number Diff line
@@ -35,6 +35,16 @@ static struct timecounter *timecounter; 
static unsigned int host_vtimer_irq;

static u32 host_vtimer_irq_flags;



static const struct kvm_irq_level default_ptimer_irq = {

	.irq	= 30,

	.level	= 1,

};



static const struct kvm_irq_level default_vtimer_irq = {

	.irq	= 27,

	.level	= 1,

};



void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu)

{

	vcpu_vtimer(vcpu)->active_cleared_last = false;
@@ -445,22 +455,11 @@ void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu) 
	kvm_timer_update_state(vcpu);

}



int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,

			 const struct kvm_irq_level *virt_irq,

			 const struct kvm_irq_level *phys_irq)

int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu)

{

	struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);

	struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);



	/*

	 * The vcpu timer irq number cannot be determined in

	 * kvm_timer_vcpu_init() because it is called much before

	 * kvm_vcpu_set_target(). To handle this, we determine

	 * vcpu timer irq number when the vcpu is reset.

	 */

	vtimer->irq.irq = virt_irq->irq;

	ptimer->irq.irq = phys_irq->irq;



	/*

	 * The bits in CNTV_CTL are architecturally reset to UNKNOWN for ARMv8

	 * and to 0 for ARMv7.  We provide an implementation that always
@@ -496,6 +495,8 @@ static void update_vtimer_cntvoff(struct kvm_vcpu *vcpu, u64 cntvoff) 
void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu)

{

	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;

	struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);

	struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);



	/* Synchronize cntvoff across all vtimers of a VM. */

	update_vtimer_cntvoff(vcpu, kvm_phys_timer_read());
@@ -504,6 +505,9 @@ void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu) 
	INIT_WORK(&timer->expired, kvm_timer_inject_irq_work);

	hrtimer_init(&timer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);

	timer->timer.function = kvm_timer_expire;



	vtimer->irq.irq = default_vtimer_irq.irq;

	ptimer->irq.irq = default_ptimer_irq.irq;

}



static void kvm_timer_init_interrupt(void *info)

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