Commit 8589a649 authored by Krishna Reddy's avatar Krishna Reddy Committed by Thierry Reding
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arm64: dts: tegra186: Enable IOMMU for SDHCI 



Enable IOMMU for all SDHCI controllers in Tegra186.

Signed-off-by: default avatarKrishna Reddy <vdumpa@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent caa7a8e3

arch/arm64/boot/dts/nvidia/tegra186.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -237,6 +237,7 @@ 
		clock-names = "sdhci";

		resets = <&bpmp TEGRA186_RESET_SDMMC1>;

		reset-names = "sdhci";

		iommus = <&smmu TEGRA186_SID_SDMMC1>;

		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";

		pinctrl-0 = <&sdmmc1_3v3>;

		pinctrl-1 = <&sdmmc1_1v8>;
@@ -262,6 +263,7 @@ 
		clock-names = "sdhci";

		resets = <&bpmp TEGRA186_RESET_SDMMC2>;

		reset-names = "sdhci";

		iommus = <&smmu TEGRA186_SID_SDMMC2>;

		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";

		pinctrl-0 = <&sdmmc2_3v3>;

		pinctrl-1 = <&sdmmc2_1v8>;
@@ -282,6 +284,7 @@ 
		clock-names = "sdhci";

		resets = <&bpmp TEGRA186_RESET_SDMMC3>;

		reset-names = "sdhci";

		iommus = <&smmu TEGRA186_SID_SDMMC3>;

		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";

		pinctrl-0 = <&sdmmc3_3v3>;

		pinctrl-1 = <&sdmmc3_1v8>;
@@ -307,6 +310,7 @@ 
		assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLC4_VCO>;

		resets = <&bpmp TEGRA186_RESET_SDMMC4>;

		reset-names = "sdhci";

		iommus = <&smmu TEGRA186_SID_SDMMC4>;

		nvidia,pad-autocal-pull-up-offset-hs400 = <0x05>;

		nvidia,pad-autocal-pull-down-offset-hs400 = <0x05>;

		nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x0a>;

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