Commit 8554926b authored by Jerome Brunet's avatar Jerome Brunet Committed by Neil Armstrong
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dt-bindings: clk: axg-audio: add g12a support



Add a new compatible string and additional clock ids for audio clock
controller of the g12a SoC family.

Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190329160649.31603-2-jbrunet@baylibre.com
parent 77a725ff
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+2 −1
Original line number Diff line number Diff line
@@ -6,7 +6,8 @@ devices.

Required Properties:

- compatible	: should be "amlogic,axg-audio-clkc" for the A113X and A113D
- compatible	: should be "amlogic,axg-audio-clkc" for the A113X and A113D,
		  "amlogic,g12a-audio-clkc" for G12A.
- reg		: physical base address of the clock controller and length of
		  memory mapped region.
- clocks	: a list of phandle + clock-specifier pairs for the clocks listed
+10 −0
Original line number Diff line number Diff line
@@ -70,5 +70,15 @@
#define AUD_CLKID_TDMOUT_A_LRCLK	134
#define AUD_CLKID_TDMOUT_B_LRCLK	135
#define AUD_CLKID_TDMOUT_C_LRCLK	136
#define AUD_CLKID_SPDIFOUT_B		151
#define AUD_CLKID_SPDIFOUT_B_CLK	152
#define AUD_CLKID_TDM_MCLK_PAD0		155
#define AUD_CLKID_TDM_MCLK_PAD1		156
#define AUD_CLKID_TDM_LRCLK_PAD0	157
#define AUD_CLKID_TDM_LRCLK_PAD1	158
#define AUD_CLKID_TDM_LRCLK_PAD2	159
#define AUD_CLKID_TDM_SCLK_PAD0		160
#define AUD_CLKID_TDM_SCLK_PAD1		161
#define AUD_CLKID_TDM_SCLK_PAD2		162

#endif /* __AXG_AUDIO_CLKC_BINDINGS_H */