Commit 854da238 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mips_fixes_4.17_1' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips 

Pull MIPS fixes from James Hogan:

 - io: Add barriers to read*() & write*()

 - dts: Fix boston PCI bus DTC warnings (4.17)

 - memset: Several corner case fixes (one 3.10, others longer)

* tag 'mips_fixes_4.17_1' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips:
  MIPS: uaccess: Add micromips clobbers to bzero invocation
  MIPS: memset.S: Fix clobber of v1 in last_fixup
  MIPS: memset.S: Fix return of __clear_user from Lpartial_fixup
  MIPS: memset.S: EVA & fault support for small_memset
  MIPS: dts: Boston: Fix PCI bus dtc warnings:
  MIPS: io: Add barrier after register read in readX()
  MIPS: io: Prevent compiler reordering writeX()
parents d08de37b b3d7e55c

arch/mips/boot/dts/img/boston.dts

+6 −0
Original line number Diff line number Diff line
@@ -51,6 +51,8 @@ 
		ranges = <0x02000000 0 0x40000000

			  0x40000000 0 0x40000000>;



		bus-range = <0x00 0xff>;



		interrupt-map-mask = <0 0 0 7>;

		interrupt-map = <0 0 0 1 &pci0_intc 1>,

				<0 0 0 2 &pci0_intc 2>,
@@ -79,6 +81,8 @@ 
		ranges = <0x02000000 0 0x20000000

			  0x20000000 0 0x20000000>;



		bus-range = <0x00 0xff>;



		interrupt-map-mask = <0 0 0 7>;

		interrupt-map = <0 0 0 1 &pci1_intc 1>,

				<0 0 0 2 &pci1_intc 2>,
@@ -107,6 +111,8 @@ 
		ranges = <0x02000000 0 0x16000000

			  0x16000000 0 0x100000>;



		bus-range = <0x00 0xff>;



		interrupt-map-mask = <0 0 0 7>;

		interrupt-map = <0 0 0 1 &pci2_intc 1>,

				<0 0 0 2 &pci2_intc 2>,

arch/mips/include/asm/io.h

+3 −1
Original line number Diff line number Diff line
@@ -307,7 +307,7 @@ static inline void iounmap(const volatile void __iomem *addr) 
#if defined(CONFIG_CPU_CAVIUM_OCTEON) || defined(CONFIG_LOONGSON3_ENHANCEMENT)

#define war_io_reorder_wmb()		wmb()

#else

#define war_io_reorder_wmb()		do { } while (0)

#define war_io_reorder_wmb()		barrier()

#endif



#define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq)			\
@@ -377,6 +377,8 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \ 
		BUG();							\

	}								\

									\

	/* prevent prefetching of coherent DMA data prematurely */	\

	rmb();								\

	return pfx##ioswab##bwlq(__mem, __val);				\

}

arch/mips/include/asm/uaccess.h

+9 −2
Original line number Diff line number Diff line
@@ -654,6 +654,13 @@ __clear_user(void __user *addr, __kernel_size_t size) 
{

	__kernel_size_t res;



#ifdef CONFIG_CPU_MICROMIPS

/* micromips memset / bzero also clobbers t7 & t8 */

#define bzero_clobbers "$4", "$5", "$6", __UA_t0, __UA_t1, "$15", "$24", "$31"

#else

#define bzero_clobbers "$4", "$5", "$6", __UA_t0, __UA_t1, "$31"

#endif /* CONFIG_CPU_MICROMIPS */



	if (eva_kernel_access()) {

		__asm__ __volatile__(

			"move\t$4, %1\n\t"
@@ -663,7 +670,7 @@ __clear_user(void __user *addr, __kernel_size_t size) 
			"move\t%0, $6"

			: "=r" (res)

			: "r" (addr), "r" (size)

			: "$4", "$5", "$6", __UA_t0, __UA_t1, "$31");

			: bzero_clobbers);

	} else {

		might_fault();

		__asm__ __volatile__(
@@ -674,7 +681,7 @@ __clear_user(void __user *addr, __kernel_size_t size) 
			"move\t%0, $6"

			: "=r" (res)

			: "r" (addr), "r" (size)

			: "$4", "$5", "$6", __UA_t0, __UA_t1, "$31");

			: bzero_clobbers);

	}



	return res;

arch/mips/lib/memset.S

+8 −3
Original line number Diff line number Diff line
@@ -219,7 +219,7 @@ 
1:	PTR_ADDIU	a0, 1			/* fill bytewise */

	R10KCBARRIER(0(ra))

	bne		t1, a0, 1b

	sb		a1, -1(a0)

	 EX(sb, a1, -1(a0), .Lsmall_fixup\@)



2:	jr		ra			/* done */

	move		a2, zero
@@ -252,13 +252,18 @@ 
	PTR_L		t0, TI_TASK($28)

	andi		a2, STORMASK

	LONG_L		t0, THREAD_BUADDR(t0)

	LONG_ADDU	a2, t1

	LONG_ADDU	a2, a0

	jr		ra

	LONG_SUBU	a2, t0



.Llast_fixup\@:

	jr		ra

	andi		v1, a2, STORMASK

	 nop



.Lsmall_fixup\@:

	PTR_SUBU	a2, t1, a0

	jr		ra

	 PTR_ADDIU	a2, 1



	.endm

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