Commit 85204959 authored by Tero Kristo's avatar Tero Kristo Committed by Stephen Boyd
Browse files

clk: ti: clkctrl: convert subclocks to use proper names also 



Addition of the new internal API to get the clkctrl names missed adding
the same conversion in place for the subclocks. This leads into missed
parent/child relationships (i.e. orphaned clocks) with mixed node name
handling, for example with omap4/omap5 where the l4_per clocks are using
new naming, but rest are using old. Fix by converting the subclock
registration to pick correct names for the clocks also.

Fixes: 6c309052 ("clk: ti: clkctrl: Fix hidden dependency to node name")
Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
Link: https://lkml.kernel.org/r/20200430083451.8562-1-t-kristo@ti.com


Acked-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent dc6dbd51

drivers/clk/ti/clkctrl.c

+48 −50
Original line number Diff line number Diff line
@@ -255,24 +255,53 @@ static struct clk_hw *_ti_omap4_clkctrl_xlate(struct of_phandle_args *clkspec, 
	return entry->clk;

}



/* Get clkctrl clock base name based on clkctrl_name or dts node */

static const char * __init clkctrl_get_clock_name(struct device_node *np,

						  const char *clkctrl_name,

						  int offset, int index,

						  bool legacy_naming)

{

	char *clock_name;



	/* l4per-clkctrl:1234:0 style naming based on clkctrl_name */

	if (clkctrl_name && !legacy_naming) {

		clock_name = kasprintf(GFP_KERNEL, "%s-clkctrl:%04x:%d",

				       clkctrl_name, offset, index);

		strreplace(clock_name, '_', '-');



		return clock_name;

	}



	/* l4per:1234:0 old style naming based on clkctrl_name */

	if (clkctrl_name)

		return kasprintf(GFP_KERNEL, "%s_cm:clk:%04x:%d",

				 clkctrl_name, offset, index);



	/* l4per_cm:1234:0 old style naming based on parent node name */

	if (legacy_naming)

		return kasprintf(GFP_KERNEL, "%pOFn:clk:%04x:%d",

				 np->parent, offset, index);



	/* l4per-clkctrl:1234:0 style naming based on node name */

	return kasprintf(GFP_KERNEL, "%pOFn:%04x:%d", np, offset, index);

}



static int __init

_ti_clkctrl_clk_register(struct omap_clkctrl_provider *provider,

			 struct device_node *node, struct clk_hw *clk_hw,

			 u16 offset, u8 bit, const char * const *parents,

			 int num_parents, const struct clk_ops *ops)

			 int num_parents, const struct clk_ops *ops,

			 const char *clkctrl_name)

{

	struct clk_init_data init = { NULL };

	struct clk *clk;

	struct omap_clkctrl_clk *clkctrl_clk;

	int ret = 0;



	if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT)

		init.name = kasprintf(GFP_KERNEL, "%pOFn:%pOFn:%04x:%d",

				      node->parent, node, offset,

				      bit);

	else

		init.name = kasprintf(GFP_KERNEL, "%pOFn:%04x:%d", node,

				      offset, bit);

	init.name = clkctrl_get_clock_name(node, clkctrl_name, offset, bit,

					   ti_clk_get_features()->flags &

					   TI_CLK_CLKCTRL_COMPAT);



	clkctrl_clk = kzalloc(sizeof(*clkctrl_clk), GFP_KERNEL);

	if (!init.name || !clkctrl_clk) {

		ret = -ENOMEM;
@@ -309,7 +338,7 @@ static void __init 
_ti_clkctrl_setup_gate(struct omap_clkctrl_provider *provider,

		       struct device_node *node, u16 offset,

		       const struct omap_clkctrl_bit_data *data,

		       void __iomem *reg)

		       void __iomem *reg, const char *clkctrl_name)

{

	struct clk_hw_omap *clk_hw;
@@ -322,7 +351,7 @@ _ti_clkctrl_setup_gate(struct omap_clkctrl_provider *provider, 


	if (_ti_clkctrl_clk_register(provider, node, &clk_hw->hw, offset,

				     data->bit, data->parents, 1,

				     &omap_gate_clk_ops))

				     &omap_gate_clk_ops, clkctrl_name))

		kfree(clk_hw);

}
@@ -330,7 +359,7 @@ static void __init 
_ti_clkctrl_setup_mux(struct omap_clkctrl_provider *provider,

		      struct device_node *node, u16 offset,

		      const struct omap_clkctrl_bit_data *data,

		      void __iomem *reg)

		      void __iomem *reg, const char *clkctrl_name)

{

	struct clk_omap_mux *mux;

	int num_parents = 0;
@@ -357,7 +386,7 @@ _ti_clkctrl_setup_mux(struct omap_clkctrl_provider *provider, 


	if (_ti_clkctrl_clk_register(provider, node, &mux->hw, offset,

				     data->bit, data->parents, num_parents,

				     &ti_clk_mux_ops))

				     &ti_clk_mux_ops, clkctrl_name))

		kfree(mux);

}
@@ -365,7 +394,7 @@ static void __init 
_ti_clkctrl_setup_div(struct omap_clkctrl_provider *provider,

		      struct device_node *node, u16 offset,

		      const struct omap_clkctrl_bit_data *data,

		      void __iomem *reg)

		      void __iomem *reg, const char *clkctrl_name)

{

	struct clk_omap_divider *div;

	const struct omap_clkctrl_div_data *div_data = data->data;
@@ -393,7 +422,7 @@ _ti_clkctrl_setup_div(struct omap_clkctrl_provider *provider, 


	if (_ti_clkctrl_clk_register(provider, node, &div->hw, offset,

				     data->bit, data->parents, 1,

				     &ti_clk_divider_ops))

				     &ti_clk_divider_ops, clkctrl_name))

		kfree(div);

}
@@ -401,7 +430,7 @@ static void __init 
_ti_clkctrl_setup_subclks(struct omap_clkctrl_provider *provider,

			  struct device_node *node,

			  const struct omap_clkctrl_reg_data *data,

			  void __iomem *reg)

			  void __iomem *reg, const char *clkctrl_name)

{

	const struct omap_clkctrl_bit_data *bits = data->bit_data;
@@ -412,17 +441,17 @@ _ti_clkctrl_setup_subclks(struct omap_clkctrl_provider *provider, 
		switch (bits->type) {

		case TI_CLK_GATE:

			_ti_clkctrl_setup_gate(provider, node, data->offset,

					       bits, reg);

					       bits, reg, clkctrl_name);

			break;



		case TI_CLK_DIVIDER:

			_ti_clkctrl_setup_div(provider, node, data->offset,

					      bits, reg);

					      bits, reg, clkctrl_name);

			break;



		case TI_CLK_MUX:

			_ti_clkctrl_setup_mux(provider, node, data->offset,

					      bits, reg);

					      bits, reg, clkctrl_name);

			break;



		default:
@@ -465,37 +494,6 @@ static char * __init clkctrl_get_name(struct device_node *np) 
	return NULL;

}



/* Get clkctrl clock base name based on clkctrl_name or dts node */

static const char * __init clkctrl_get_clock_name(struct device_node *np,

						  const char *clkctrl_name,

						  int offset, int index,

						  bool legacy_naming)

{

	char *clock_name;



	/* l4per-clkctrl:1234:0 style naming based on clkctrl_name */

	if (clkctrl_name && !legacy_naming) {

		clock_name = kasprintf(GFP_KERNEL, "%s-clkctrl:%04x:%d",

				       clkctrl_name, offset, index);

		strreplace(clock_name, '_', '-');



		return clock_name;

	}



	/* l4per:1234:0 old style naming based on clkctrl_name */

	if (clkctrl_name)

		return kasprintf(GFP_KERNEL, "%s_cm:clk:%04x:%d",

				 clkctrl_name, offset, index);



	/* l4per_cm:1234:0 old style naming based on parent node name */

	if (legacy_naming)

		return kasprintf(GFP_KERNEL, "%pOFn:clk:%04x:%d",

				 np->parent, offset, index);



	/* l4per-clkctrl:1234:0 style naming based on node name */

	return kasprintf(GFP_KERNEL, "%pOFn:%04x:%d", np, offset, index);

}



static void __init _ti_omap4_clkctrl_setup(struct device_node *node)

{

	struct omap_clkctrl_provider *provider;
@@ -663,7 +661,7 @@ clkdm_found: 
		hw->enable_reg.ptr = provider->base + reg_data->offset;



		_ti_clkctrl_setup_subclks(provider, node, reg_data,

					  hw->enable_reg.ptr);

					  hw->enable_reg.ptr, clkctrl_name);



		if (reg_data->flags & CLKF_SW_SUP)

			hw->enable_bit = MODULEMODE_SWCTRL;

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