Commit 84de6ab0 authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/603: don't handle PAGE_ACCESSED in TLB miss handlers. 



PAGE_ACCESSED is only needed for CONFIG_SWAP. When CONFIG_SWAP
is not set, just ignore it. If CONFIG_SWAP is set and PAGE_ACCESSED
is not, let's take a minor fault.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 451b3ec0

arch/powerpc/kernel/head_32.S

+13 −11
Original line number Diff line number Diff line
@@ -503,7 +503,11 @@ InstructionTLBMiss: 
	cmplw	0,r1,r3

#endif

	mfspr	r2, SPRN_SPRG_PGDIR

#ifdef CONFIG_SWAP

	li	r1,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC

#else

	li	r1,_PAGE_PRESENT | _PAGE_EXEC

#endif

#if defined(CONFIG_MODULES) || defined(CONFIG_DEBUG_PAGEALLOC)

	bge-	112f

	lis	r2, (swapper_pg_dir - PAGE_OFFSET)@ha	/* if kernel address, use */
@@ -517,12 +521,6 @@ InstructionTLBMiss: 
	lwz	r0,0(r2)		/* get linux-style pte */

	andc.	r1,r1,r0		/* check access & ~permission */

	bne-	InstructionAddressInvalid /* return if access not permitted */

	ori	r0,r0,_PAGE_ACCESSED	/* set _PAGE_ACCESSED in pte */

	/*

	 * NOTE! We are assuming this is not an SMP system, otherwise

	 * we would need to update the pte atomically with lwarx/stwcx.

	 */

	stw	r0,0(r2)		/* update PTE (accessed bit) */

	/* Convert linux-style PTE to low word of PPC-style PTE */

	rlwimi	r0,r0,32-1,30,30	/* _PAGE_USER -> PP msb */

	ori	r1, r1, 0xe05		/* clear out reserved bits */
@@ -571,7 +569,11 @@ DataLoadTLBMiss: 
	lis	r1,PAGE_OFFSET@h		/* check if kernel address */

	cmplw	0,r1,r3

	mfspr	r2, SPRN_SPRG_PGDIR

#ifdef CONFIG_SWAP

	li	r1, _PAGE_PRESENT | _PAGE_ACCESSED

#else

	li	r1, _PAGE_PRESENT

#endif

	bge-	112f

	lis	r2, (swapper_pg_dir - PAGE_OFFSET)@ha	/* if kernel address, use */

	addi	r2, r2, (swapper_pg_dir - PAGE_OFFSET)@l	/* kernel page table */
@@ -583,12 +585,10 @@ DataLoadTLBMiss: 
	lwz	r0,0(r2)		/* get linux-style pte */

	andc.	r1,r1,r0		/* check access & ~permission */

	bne-	DataAddressInvalid	/* return if access not permitted */

	ori	r0,r0,_PAGE_ACCESSED	/* set _PAGE_ACCESSED in pte */

	/*

	 * NOTE! We are assuming this is not an SMP system, otherwise

	 * we would need to update the pte atomically with lwarx/stwcx.

	 */

	stw	r0,0(r2)		/* update PTE (accessed bit) */

	/* Convert linux-style PTE to low word of PPC-style PTE */

	rlwinm	r1,r0,32-10,31,31	/* _PAGE_RW -> PP lsb */

	rlwimi	r0,r0,32-1,30,30	/* _PAGE_USER -> PP msb */
@@ -649,7 +649,11 @@ DataStoreTLBMiss: 
	lis	r1,PAGE_OFFSET@h		/* check if kernel address */

	cmplw	0,r1,r3

	mfspr	r2, SPRN_SPRG_PGDIR

	li	r1, _PAGE_RW | _PAGE_PRESENT /* access flags */

#ifdef CONFIG_SWAP

	li	r1, _PAGE_RW | _PAGE_PRESENT | _PAGE_ACCESSED

#else

	li	r1, _PAGE_RW | _PAGE_PRESENT

#endif

	bge-	112f

	lis	r2, (swapper_pg_dir - PAGE_OFFSET)@ha	/* if kernel address, use */

	addi	r2, r2, (swapper_pg_dir - PAGE_OFFSET)@l	/* kernel page table */
@@ -661,12 +665,10 @@ DataStoreTLBMiss: 
	lwz	r0,0(r2)		/* get linux-style pte */

	andc.	r1,r1,r0		/* check access & ~permission */

	bne-	DataAddressInvalid	/* return if access not permitted */

	ori	r0,r0,_PAGE_ACCESSED

	/*

	 * NOTE! We are assuming this is not an SMP system, otherwise

	 * we would need to update the pte atomically with lwarx/stwcx.

	 */

	stw	r0,0(r2)		/* update PTE (accessed/dirty bits) */

	/* Convert linux-style PTE to low word of PPC-style PTE */

	rlwimi	r0,r0,32-1,30,30	/* _PAGE_USER -> PP msb */

	li	r1,0xe05		/* clear out reserved bits & PP lsb */

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