Merge tag 'linux-kselftest-5.3-rc1' of... (8487d822) · Commits · 戴 / test

tools/testing/selftests/cgroup/test_freezer.c

+0 −1

Original line number	Diff line number	Diff line
		@@ -11,7 +11,6 @@
		#include <stdlib.h>
		#include <sys/inotify.h>
		#include <string.h>
		#include <sys/types.h>
		#include <sys/wait.h>

		#include "../kselftest.h"

tools/testing/selftests/drivers/dma-buf/config

0 → 100644

+1 −0

Original line number	Diff line number	Diff line
		CONFIG_UDMABUF=y

tools/testing/selftests/networking/timestamping/timestamping.c

+1 −8

Original line number	Diff line number	Diff line
		@@ -32,6 +32,7 @@
		#include <asm/types.h>
		#include <linux/net_tstamp.h>
		#include <linux/errqueue.h>
		#include <linux/sockios.h>

		#ifndef SO_TIMESTAMPING
		# define SO_TIMESTAMPING 37
		@@ -42,14 +43,6 @@
		# define SO_TIMESTAMPNS 35
		#endif

		#ifndef SIOCGSTAMPNS
		# define SIOCGSTAMPNS 0x8907
		#endif

		#ifndef SIOCSHWTSTAMP
		# define SIOCSHWTSTAMP 0x89b0
		#endif

		static void usage(const char *error)
		{
		if (error)

tools/testing/selftests/rseq/rseq-arm.h

+33 −28

Original line number	Diff line number	Diff line
		@@ -6,6 +6,8 @@
		*/

		/*
		* - ARM little endian
		*
		* RSEQ_SIG uses the udf A32 instruction with an uncommon immediate operand
		* value 0x5de3. This traps if user-space reaches this instruction by mistake,
		* and the uncommon operand ensures the kernel does not move the instruction
		@@ -22,36 +24,40 @@
		* def3 udf #243 ; 0xf3
		* e7f5 b.n <7f5>
		*
		* pre-ARMv6 big endian code:
		* e7f5 b.n <7f5>
		* def3 udf #243 ; 0xf3
		* - ARMv6+ big endian (BE8):
		*
		* ARMv6+ -mbig-endian generates mixed endianness code vs data: little-endian
		* code and big-endian data. Ensure the RSEQ_SIG data signature matches code
		* endianness. Prior to ARMv6, -mbig-endian generates big-endian code and data
		* (which match), so there is no need to reverse the endianness of the data
		* representation of the signature. However, the choice between BE32 and BE8
		* is done by the linker, so we cannot know whether code and data endianness
		* will be mixed before the linker is invoked.
		* code and big-endian data. The data value of the signature needs to have its
		* byte order reversed to generate the trap instruction:
		*
		* Data: 0xf3def5e7
		*
		* Translates to this A32 instruction pattern:
		*
		* e7f5def3 udf #24035 ; 0x5de3
		*
		* Translates to this T16 instruction pattern:
		*
		* def3 udf #243 ; 0xf3
		* e7f5 b.n <7f5>
		*
		* - Prior to ARMv6 big endian (BE32):
		*
		* Prior to ARMv6, -mbig-endian generates big-endian code and data
		* (which match), so the endianness of the data representation of the
		* signature should not be reversed. However, the choice between BE32
		* and BE8 is done by the linker, so we cannot know whether code and
		* data endianness will be mixed before the linker is invoked. So rather
		* than try to play tricks with the linker, the rseq signature is simply
		* data (not a trap instruction) prior to ARMv6 on big endian. This is
		* why the signature is expressed as data (.word) rather than as
		* instruction (.inst) in assembler.
		*/

		#define RSEQ_SIG_CODE 0xe7f5def3

		#ifndef __ASSEMBLER__

		#define RSEQ_SIG_DATA \
		({ \
		int sig; \
		asm volatile ("b 2f\n\t" \
		"1: .inst " __rseq_str(RSEQ_SIG_CODE) "\n\t" \
		"2:\n\t" \
		"ldr %[sig], 1b\n\t" \
		: [sig] "=r" (sig)); \
		sig; \
		})

		#define RSEQ_SIG RSEQ_SIG_DATA

		#ifdef __ARMEB__
		#define RSEQ_SIG 0xf3def5e7 /* udf #24035 ; 0x5de3 (ARMv6+) */
		#else
		#define RSEQ_SIG 0xe7f5def3 /* udf #24035 ; 0x5de3 */
		#endif

		#define rseq_smp_mb() __asm__ __volatile__ ("dmb" ::: "memory", "cc")
		@@ -125,8 +131,7 @@ do { \
		__rseq_str(table_label) ":\n\t" \
		".word " __rseq_str(version) ", " __rseq_str(flags) "\n\t" \
		".word " __rseq_str(start_ip) ", 0x0, " __rseq_str(post_commit_offset) ", 0x0, " __rseq_str(abort_ip) ", 0x0\n\t" \
		".arm\n\t" \
		".inst " __rseq_str(RSEQ_SIG_CODE) "\n\t" \
		".word " __rseq_str(RSEQ_SIG) "\n\t" \
		__rseq_str(label) ":\n\t" \
		teardown \
		"b %l[" __rseq_str(abort_label) "]\n\t"

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