Commit 84877256 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/pp: Add querying current gfx voltage for CI/VI 



Store the voltage regulator configuration,
so we can properly query the voltage.

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 680731ad

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

+11 −1
Original line number Diff line number Diff line
@@ -3317,7 +3317,7 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, 
			    void *value, int *size)

{

	uint32_t sclk, mclk, activity_percent;

	uint32_t offset;

	uint32_t offset, val_vid;

	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);



	/* size must be at least 4 bytes for all sensors */
@@ -3365,6 +3365,16 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, 
			return -EINVAL;

		*size = sizeof(struct pp_gpu_power);

		return smu7_get_gpu_power(hwmgr, (struct pp_gpu_power *)value);

	case AMDGPU_PP_SENSOR_VDDGFX:

		if ((data->vr_config & 0xff) == 0x2)

			val_vid = PHM_READ_INDIRECT_FIELD(hwmgr->device,

					CGS_IND_REG__SMC, PWR_SVI2_STATUS, PLANE2_VID);

		else

			val_vid = PHM_READ_INDIRECT_FIELD(hwmgr->device,

					CGS_IND_REG__SMC, PWR_SVI2_STATUS, PLANE1_VID);



		*((uint32_t *)value) = (uint32_t)convert_to_vddc(val_vid);

		return 0;

	default:

		return -EINVAL;

	}

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h

+1 −0
Original line number Diff line number Diff line
@@ -305,6 +305,7 @@ struct smu7_hwmgr { 
	uint32_t                              frame_time_x2;

	uint16_t                              mem_latency_high;

	uint16_t                              mem_latency_low;

	uint32_t                              vr_config;

};



/* To convert to Q8.8 format for firmware */

drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c

+1 −1
Original line number Diff line number Diff line
@@ -2141,7 +2141,7 @@ static int fiji_init_smc_table(struct pp_hwmgr *hwmgr) 
	result = fiji_populate_vr_config(hwmgr, table);

	PP_ASSERT_WITH_CODE(0 == result,

			"Failed to populate VRConfig setting!", return result);



	data->vr_config = table->VRConfig;

	table->ThermGpio = 17;

	table->SclkStepSize = 0x4000;

drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c

+1 −1
Original line number Diff line number Diff line
@@ -1991,7 +1991,7 @@ static int polaris10_init_smc_table(struct pp_hwmgr *hwmgr) 
	result = polaris10_populate_vr_config(hwmgr, table);

	PP_ASSERT_WITH_CODE(0 == result,

			"Failed to populate VRConfig setting!", return result);



	hw_data->vr_config = table->VRConfig;

	table->ThermGpio = 17;

	table->SclkStepSize = 0x4000;

drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c

+1 −2
Original line number Diff line number Diff line
@@ -2434,7 +2434,7 @@ static int tonga_init_smc_table(struct pp_hwmgr *hwmgr) 
	result = tonga_populate_vr_config(hwmgr, table);

	PP_ASSERT_WITH_CODE(!result,

		"Failed to populate VRConfig setting !", return result);



	data->vr_config = table->VRConfig;

	table->ThermGpio  = 17;

	table->SclkStepSize = 0x4000;
@@ -2501,7 +2501,6 @@ static int tonga_init_smc_table(struct pp_hwmgr *hwmgr) 


	for (i = 0; i < SMU72_MAX_ENTRIES_SMIO; i++)

		table->Smio[i] = PP_HOST_TO_SMC_UL(table->Smio[i]);



	CONVERT_FROM_HOST_TO_SMC_UL(table->SystemFlags);

	CONVERT_FROM_HOST_TO_SMC_UL(table->VRConfig);

	CONVERT_FROM_HOST_TO_SMC_UL(table->SmioMask1);

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