Commit 84873cb7 authored Oct 18, 2013 by Linus Walleij

ARM: ux500: fix clock for GPIO block 8



The clock assignment in the device tree for GPIO block 8 was
incorrect, indicating this was managed by bit 1 on PRCC 6
while it was in fact bit 1 on PRCC 5.

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

parent 741a6c4c

arch/arm/boot/dts/ste-dbx5x0.dtsi

+1 −1

Original line number	Diff line number	Diff line
		@@ -227,7 +227,7 @@
		#gpio-cells = <2>;
		gpio-bank = <8>;

		clocks = <&prcc_pclk 6 1>;
		clocks = <&prcc_pclk 5 1>;
		};

		pinctrl {

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