Commit 84658cbd authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v4.5-rockchip-dts32-2' of... 

Merge tag 'v4.5-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Another new soc - the rk3228 quad-core cortex-a7, a new rk3036 board,
support for the efuses on Rockchip socs and some improvements for
rk3288 regulators.

* tag 'v4.5-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  ARM: dts: rockchip: add the kylin board for rk3036
  ARM: dts: rockchip: add the sdio/sdmmc node for rk3036
  ARM: dts: rockchip: fix the pinctrl bias settings for rk3036
  ARM: dts: rockchip: add eFuse node for rk3188 SoCs
  ARM: dts: rockchip: add eFuse node for rk3066a SoCs
  ARM: dts: rockchip: add eFuse config of rk3288 SoC
  ARM: dts: rockchip: add rk3228-evb board
  ARM: dts: rockchip: add core rk3228 dtsi
  clk: rockchip: Add the clock ids of rk3288 eFuses
  ARM: dts: rockchip: Fix typo in rk3288 sdmmc card detect pin name
  ARM: dts: rockchip: fix voltage ranges for rk3288-evb-act8846 board
  ARM: dts: rockchip: move the public part to rk3288-evb common
  ARM: dts: rockchip: add 2 regulators for rk3288-evb-act8846
  ARM: dts: rockchip: correct the name of REG8 for rk3288-evb-act8846
  clk: rockchip: add dt-binding header for rk3228
  clk: rockchip: add id for mipidsi sclk on rk3288

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 12ee126d 94cf32b9

Documentation/devicetree/bindings/arm/rockchip.txt

+8 −0
Original line number Diff line number Diff line 
Rockchip platforms device tree bindings

---------------------------------------



- Kylin RK3036 board:

    Required root node properties:

      - compatible = "rockchip,kylin-rk3036", "rockchip,rk3036";



- MarsBoard RK3066 board:

    Required root node properties:

      - compatible = "haoyu,marsboard-rk3066", "rockchip,rk3066a";
@@ -86,3 +90,7 @@ Rockchip platforms device tree bindings 
- Rockchip R88 board:

    Required root node properties:

      - compatible = "rockchip,r88", "rockchip,rk3368";



- Rockchip RK3228 Evaluation board:

    Required root node properties:

      - compatible = "rockchip,rk3228-evb", "rockchip,rk3228";

arch/arm/boot/dts/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -527,10 +527,12 @@ dtb-$(CONFIG_ARCH_REALVIEW) += \ 
	arm-realview-pb11mp.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += \

	rk3036-evb.dtb \

	rk3036-kylin.dtb \

	rk3066a-bqcurie2.dtb \

	rk3066a-marsboard.dtb \

	rk3066a-rayeager.dtb \

	rk3188-radxarock.dtb \

	rk3228-evb.dtb \

	rk3288-evb-act8846.dtb \

	rk3288-evb-rk808.dtb \

	rk3288-firefly-beta.dtb \

arch/arm/boot/dts/rk3036-kylin.dts

0 → 100644
+300 −0
Original line number Diff line number Diff line 
/*

 * This file is dual-licensed: you can use it either under the terms

 * of the GPL or the X11 license, at your option. Note that this dual

 * licensing only applies to this file, and not this project as a

 * whole.

 *

 *  a) This file is free software; you can redistribute it and/or

 *     modify it under the terms of the GNU General Public License as

 *     published by the Free Software Foundation; either version 2 of the

 *     License, or (at your option) any later version.

 *

 *     This file is distributed in the hope that it will be useful,

 *     but WITHOUT ANY WARRANTY; without even the implied warranty of

 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *     GNU General Public License for more details.

 *

 *  Or, alternatively,

 *

 *  b) Permission is hereby granted, free of charge, to any person

 *     obtaining a copy of this software and associated documentation

 *     files (the "Software"), to deal in the Software without

 *     restriction, including without limitation the rights to use,

 *     copy, modify, merge, publish, distribute, sublicense, and/or

 *     sell copies of the Software, and to permit persons to whom the

 *     Software is furnished to do so, subject to the following

 *     conditions:

 *

 *     The above copyright notice and this permission notice shall be

 *     included in all copies or substantial portions of the Software.

 *

 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES

 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT

 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,

 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 *     OTHER DEALINGS IN THE SOFTWARE.

 */



/dts-v1/;



#include "rk3036.dtsi"



/ {

	model = "Rockchip RK3036 KylinBoard";

	compatible = "rockchip,rk3036-kylin", "rockchip,rk3036";



	vcc_sys: vsys-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vcc_sys";

		regulator-min-microvolt = <5000000>;

		regulator-max-microvolt = <5000000>;

		regulator-always-on;

		regulator-boot-on;

	};

};



&acodec {

	status = "okay";

};



&emmc {

	status = "okay";

};



&i2c1 {

	clock-frequency = <400000>;



	status = "okay";



	rk808: pmic@1b {

		compatible = "rockchip,rk808";

		reg = <0x1b>;

		interrupt-parent = <&gpio2>;

		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;

		pinctrl-names = "default";

		pinctrl-0 = <&pmic_int &global_pwroff>;

		rockchip,system-power-controller;

		wakeup-source;

		#clock-cells = <1>;

		clock-output-names = "xin32k", "rk808-clkout2";



		vcc1-supply = <&vcc_sys>;

		vcc2-supply = <&vcc_sys>;

		vcc3-supply = <&vcc_sys>;

		vcc4-supply = <&vcc_sys>;

		vcc6-supply = <&vcc_sys>;

		vcc7-supply = <&vcc_sys>;

		vcc8-supply = <&vcc_18>;

		vcc9-supply = <&vcc_io>;

		vcc10-supply = <&vcc_io>;

		vcc11-supply = <&vcc_sys>;

		vcc12-supply = <&vcc_io>;

		vddio-supply = <&vccio_pmu>;



		regulators {

			vdd_cpu: DCDC_REG1 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <750000>;

				regulator-max-microvolt = <1350000>;

				regulator-name = "vdd_arm";

				regulator-state-mem {

					regulator-off-in-suspend;

				};

			};



			vdd_gpu: DCDC_REG2 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <850000>;

				regulator-max-microvolt = <1250000>;

				regulator-name = "vdd_gpu";

				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <1000000>;

				};

			};



			vcc_ddr: DCDC_REG3 {

				regulator-always-on;

				regulator-boot-on;

				regulator-name = "vcc_ddr";

				regulator-state-mem {

					regulator-on-in-suspend;

				};

			};



			vcc_io: DCDC_REG4 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3300000>;

				regulator-name = "vcc_io";

				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <3300000>;

				};

			};



			vccio_pmu: LDO_REG1 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3300000>;

				regulator-name = "vccio_pmu";

				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <3300000>;

				};

			};



			vcc_tp: LDO_REG2 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3300000>;

				regulator-name = "vcc_tp";

				regulator-state-mem {

					regulator-off-in-suspend;

				};

			};



			vdd_10: LDO_REG3 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <1000000>;

				regulator-max-microvolt = <1000000>;

				regulator-name = "vdd_10";

				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <1000000>;

				};

			};



			vcc18_lcd: LDO_REG4 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-name = "vcc18_lcd";

				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <1800000>;

				};

			};



			vccio_sd: LDO_REG5 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3300000>;

				regulator-name = "vccio_sd";

				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <3300000>;

				};

			};



			vout5: LDO_REG6 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <2500000>;

				regulator-name = "vout5";

				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <1800000>;

				};

			};



			vcc_18: LDO_REG7 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-name = "vcc_18";

				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <1800000>;

				};

			};



			vcca_codec: LDO_REG8 {

				regulator-always-on;

				regulator-boot-on;

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-name = "vcca_codec";

				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <1800000>;

				};

			};



			vcc_wl: SWITCH_REG1 {

				regulator-always-on;

				regulator-boot-on;

				regulator-name = "vcc_wl";

				regulator-state-mem {

					regulator-on-in-suspend;

				};

			};



			vcc_lcd: SWITCH_REG2 {

				regulator-always-on;

				regulator-boot-on;

				regulator-name = "vcc_lcd";

				regulator-state-mem {

					regulator-on-in-suspend;

				};

			};

		};

	};

};



&i2c2 {

	status = "okay";

};



&sdio {

	status = "okay";



	broken-cd;

	bus-width = <4>;

	cap-sdio-irq;

	default-sample-phase = <90>;

	keep-power-in-suspend;

	non-removable;

	num-slots = <1>;

	pinctrl-names = "default";

	pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;

};



&uart2 {

	status = "okay";

};



&usb_host {

	status = "okay";

};



&usb_otg {

	status = "okay";

};



&pinctrl {

	pmic {

		pmic_int: pmic-int {

			rockchip,pins = <2 2 RK_FUNC_GPIO &pcfg_pull_default>;

		};

	};



	sleep {

		global_pwroff: global-pwroff {

			rockchip,pins = <2 7 RK_FUNC_1 &pcfg_pull_none>;

		};

	};

};

arch/arm/boot/dts/rk3036.dtsi

+87 −19
Original line number Diff line number Diff line
@@ -55,6 +55,8 @@ 
		i2c1 = &i2c1;

		i2c2 = &i2c2;

		mshc0 = &emmc;

		mshc1 = &sdmmc;

		mshc2 = &sdio;

		serial0 = &uart0;

		serial1 = &uart1;

		serial2 = &uart2;
@@ -184,6 +186,30 @@ 
		status = "disabled";

	};



	sdmmc: dwmmc@10214000 {

		compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";

		reg = <0x10214000 0x4000>;

		clock-frequency = <37500000>;

		clock-freq-min-max = <400000 37500000>;

		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;

		clock-names = "biu", "ciu";

		fifo-depth = <0x100>;

		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

		status = "disabled";

	};



	sdio: dwmmc@10218000 {

		compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";

		reg = <0x10218000 0x4000>;

		clock-freq-min-max = <400000 37500000>;

		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,

			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;

		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";

		fifo-depth = <0x100>;

		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;

		status = "disabled";

	};



	emmc: dwmmc@1021c000 {

		compatible = "rockchip,rk3288-dw-mshc";

		reg = <0x1021c000 0x4000>;
@@ -427,12 +453,8 @@ 
			#interrupt-cells = <2>;

		};



		pcfg_pull_up: pcfg-pull-up {

			bias-pull-up;

		};



		pcfg_pull_down: pcfg-pull-down {

			bias-pull-down;

		pcfg_pull_default: pcfg_pull_default {

			bias-pull-pin-default;

		};



		pcfg_pull_none: pcfg-pull-none {
@@ -463,6 +485,52 @@ 
			};

		};



		sdmmc {

			sdmmc_clk: sdmmc-clk {

				rockchip,pins = <1 16 RK_FUNC_1 &pcfg_pull_none>;

			};



			sdmmc_cmd: sdmmc-cmd {

				rockchip,pins = <1 15 RK_FUNC_1 &pcfg_pull_default>;

			};



			sdmmc_cd: sdmcc-cd {

				rockchip,pins = <1 17 RK_FUNC_1 &pcfg_pull_default>;

			};



			sdmmc_bus1: sdmmc-bus1 {

				rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_default>;

			};



			sdmmc_bus4: sdmmc-bus4 {

				rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_default>,

						<1 19 RK_FUNC_1 &pcfg_pull_default>,

						<1 20 RK_FUNC_1 &pcfg_pull_default>,

						<1 21 RK_FUNC_1 &pcfg_pull_default>;

			};

		};



		sdio {

			sdio_bus1: sdio-bus1 {

				rockchip,pins = <0 11 RK_FUNC_1 &pcfg_pull_default>;

			};



			sdio_bus4: sdio-bus4 {

				rockchip,pins = <0 11 RK_FUNC_1 &pcfg_pull_default>,

						<0 12 RK_FUNC_1 &pcfg_pull_default>,

						<0 13 RK_FUNC_1 &pcfg_pull_default>,

						<0 14 RK_FUNC_1 &pcfg_pull_default>;

			};



			sdio_cmd: sdio-cmd {

				rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_default>;

			};



			sdio_clk: sdio-clk {

				rockchip,pins = <0 9 RK_FUNC_1 &pcfg_pull_none>;

			};

		};



		emmc {

			/*

			 * We run eMMC at max speed; bump up drive strength.
@@ -473,18 +541,18 @@ 
			};



			emmc_cmd: emmc-cmd {

				rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_none>;

				rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_default>;

			};



			emmc_bus8: emmc-bus8 {

				rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_none>,

						<1 25 RK_FUNC_2 &pcfg_pull_none>,

						<1 26 RK_FUNC_2 &pcfg_pull_none>,

						<1 27 RK_FUNC_2 &pcfg_pull_none>,

						<1 28 RK_FUNC_2 &pcfg_pull_none>,

						<1 29 RK_FUNC_2 &pcfg_pull_none>,

						<1 30 RK_FUNC_2 &pcfg_pull_none>,

						<1 31 RK_FUNC_2 &pcfg_pull_none>;

				rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_default>,

						<1 25 RK_FUNC_2 &pcfg_pull_default>,

						<1 26 RK_FUNC_2 &pcfg_pull_default>,

						<1 27 RK_FUNC_2 &pcfg_pull_default>,

						<1 28 RK_FUNC_2 &pcfg_pull_default>,

						<1 29 RK_FUNC_2 &pcfg_pull_default>,

						<1 30 RK_FUNC_2 &pcfg_pull_default>,

						<1 31 RK_FUNC_2 &pcfg_pull_default>;

			};

		};
@@ -522,12 +590,12 @@ 


		uart0 {

			uart0_xfer: uart0-xfer {

				rockchip,pins = <0 16 RK_FUNC_1 &pcfg_pull_up>,

				rockchip,pins = <0 16 RK_FUNC_1 &pcfg_pull_default>,

						<0 17 RK_FUNC_1 &pcfg_pull_none>;

			};



			uart0_cts: uart0-cts {

				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_up>;

				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_default>;

			};



			uart0_rts: uart0-rts {
@@ -537,7 +605,7 @@ 


		uart1 {

			uart1_xfer: uart1-xfer {

				rockchip,pins = <2 22 RK_FUNC_1 &pcfg_pull_none>,

				rockchip,pins = <2 22 RK_FUNC_1 &pcfg_pull_default>,

						<2 23 RK_FUNC_1 &pcfg_pull_none>;

			};

			/* no rts / cts for uart1 */
@@ -545,7 +613,7 @@ 


		uart2 {

			uart2_xfer: uart2-xfer {

				rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_none>,

				rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_default>,

						<1 19 RK_FUNC_2 &pcfg_pull_none>;

			};

			/* no rts / cts for uart2 */

arch/arm/boot/dts/rk3066a.dtsi

+13 −0
Original line number Diff line number Diff line
@@ -159,6 +159,19 @@ 
		clock-names = "timer", "pclk";

	};



	efuse: efuse@20010000 {

		compatible = "rockchip,rockchip-efuse";

		reg = <0x20010000 0x4000>;

		#address-cells = <1>;

		#size-cells = <1>;

		clocks = <&cru PCLK_EFUSE>;

		clock-names = "pclk_efuse";



		cpu_leakage: cpu_leakage {

			reg = <0x17 0x1>;

		};

	};



	timer@20038000 {

		compatible = "snps,dw-apb-timer-osc";

		reg = <0x20038000 0x100>;

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