arm64: dts: renesas: r8a77965: m3nulcb: Initial device tree

dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb

dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb

dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-x.dtb r8a77965-salvator-xs.dtb

dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-m3nulcb.dtb

dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb r8a77970-v3msk.dtb

dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb r8a77980-v3hsk.dtb

dtb-$(CONFIG_ARCH_R8A77990) += r8a77990-ebisu.dtb

// SPDX-License-Identifier: GPL-2.0

/*

 * Device Tree Source for the M3NULCB (R-Car Starter Kit Pro) board

 *

 * Copyright (C) 2018 Renesas Electronics Corp.

 * Copyright (C) 2018 Cogent Embedded, Inc.

 */

/dts-v1/;

#include "r8a77965.dtsi"

#include "ulcb.dtsi"

/ {

	model = "Renesas M3NULCB board based on r8a77965";

	compatible = "renesas,m3nulcb", "renesas,r8a77965";

	memory@48000000 {

		device_type = "memory";

		/* first 128MB is reserved for secure area. */

		reg = <0x0 0x48000000 0x0 0x78000000>;

	};

};

&du {

	clocks = <&cpg CPG_MOD 724>,

		 <&cpg CPG_MOD 723>,

		 <&cpg CPG_MOD 721>,

		 <&versaclock5 1>,

		 <&versaclock5 3>,

		 <&versaclock5 2>;

	clock-names = "du.0", "du.1", "du.3",

		      "dclkin.0", "dclkin.1", "dclkin.3";

};