Commit 83e53802 authored by Chris Wilson's avatar Chris Wilson Committed by Jani Nikula
Browse files

drm/i915: Fix gen8 semaphores id for legacy mode 



With the introduction of a distinct engine->id vs the hardware id, we need
to fix up the value we use for selecting the target engine when signaling
a semaphore. Note that these values can be merged with engine->guc_id.

Fixes: de1add36
Cc: stable@vger.kernel.org # v4.6
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1461932305-14637-3-git-send-email-chris@chris-wilson.co.uk


(cherry picked from commit 215a7e32)
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 2bae0304

drivers/gpu/drm/i915/intel_ringbuffer.c

+7 −2
Original line number Diff line number Diff line
@@ -1309,7 +1309,7 @@ static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req, 
		intel_ring_emit(signaller, seqno);

		intel_ring_emit(signaller, 0);

		intel_ring_emit(signaller, MI_SEMAPHORE_SIGNAL |

					   MI_SEMAPHORE_TARGET(waiter->id));

					   MI_SEMAPHORE_TARGET(waiter->hw_id));

		intel_ring_emit(signaller, 0);

	}
@@ -1349,7 +1349,7 @@ static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req, 
		intel_ring_emit(signaller, upper_32_bits(gtt_offset));

		intel_ring_emit(signaller, seqno);

		intel_ring_emit(signaller, MI_SEMAPHORE_SIGNAL |

					   MI_SEMAPHORE_TARGET(waiter->id));

					   MI_SEMAPHORE_TARGET(waiter->hw_id));

		intel_ring_emit(signaller, 0);

	}
@@ -2778,6 +2778,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev) 
	engine->name = "render ring";

	engine->id = RCS;

	engine->exec_id = I915_EXEC_RENDER;

	engine->hw_id = 0;

	engine->mmio_base = RENDER_RING_BASE;



	if (INTEL_INFO(dev)->gen >= 8) {
@@ -2929,6 +2930,7 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev) 
	engine->name = "bsd ring";

	engine->id = VCS;

	engine->exec_id = I915_EXEC_BSD;

	engine->hw_id = 1;



	engine->write_tail = ring_write_tail;

	if (INTEL_INFO(dev)->gen >= 6) {
@@ -3007,6 +3009,7 @@ int intel_init_bsd2_ring_buffer(struct drm_device *dev) 
	engine->name = "bsd2 ring";

	engine->id = VCS2;

	engine->exec_id = I915_EXEC_BSD;

	engine->hw_id = 4;



	engine->write_tail = ring_write_tail;

	engine->mmio_base = GEN8_BSD2_RING_BASE;
@@ -3039,6 +3042,7 @@ int intel_init_blt_ring_buffer(struct drm_device *dev) 
	engine->name = "blitter ring";

	engine->id = BCS;

	engine->exec_id = I915_EXEC_BLT;

	engine->hw_id = 2;



	engine->mmio_base = BLT_RING_BASE;

	engine->write_tail = ring_write_tail;
@@ -3098,6 +3102,7 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev) 
	engine->name = "video enhancement ring";

	engine->id = VECS;

	engine->exec_id = I915_EXEC_VEBOX;

	engine->hw_id = 3;



	engine->mmio_base = VEBOX_RING_BASE;

	engine->write_tail = ring_write_tail;

drivers/gpu/drm/i915/intel_ringbuffer.h

+2 −1
Original line number Diff line number Diff line
@@ -156,7 +156,8 @@ struct intel_engine_cs { 
#define I915_NUM_ENGINES 5

#define _VCS(n) (VCS + (n))

	unsigned int exec_id;

	unsigned int guc_id;

	unsigned int hw_id;

	unsigned int guc_id; /* XXX same as hw_id? */

	u32		mmio_base;

	struct		drm_device *dev;

	struct intel_ringbuffer *buffer;

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