Commit 83da6eea authored Sep 02, 2020 by Evan Quan Committed by Alex Deucher Oct 14, 2020

drm/amd/pm: increase mclk switch threshold to 200 us



To avoid underflow seen on Polaris10 with some 3440x1440
144Hz displays. As the threshold of 190 us cuts too close
to minVBlankTime of 192 us.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org

parent 39ec39d7

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -2883,7 +2883,7 @@ static int smu7_vblank_too_short(struct pp_hwmgr *hwmgr,
		if (hwmgr->is_kicker)
		switch_limit_us = data->is_memory_gddr5 ? 450 : 150;
		else
		switch_limit_us = data->is_memory_gddr5 ? 190 : 150;
		switch_limit_us = data->is_memory_gddr5 ? 200 : 150;
		break;
		case CHIP_VEGAM:
		switch_limit_us = 30;

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