drm/i915: Fix vbt PWM max setup for CTG (83d83392) · Commits · 戴 / test

CTG uses hrawclk for backlight, so calculate the max based on that instead of cdclk. Fixes: ("drm/i915: initialize backlight max from VBT") Signed-off-by:

Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1448893432-6978-3-git-send-email-ville.syrjala@linux.intel.com Reviewed-by:

Jani Nikula <jani.nikula@intel.com>

drivers/gpu/drm/i915/intel_panel.c

+8 −2

Original line number	Diff line number	Diff line
		@@ -1352,13 +1352,19 @@ static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)

		/*
		* Gen4: This value represents the period of the PWM stream in display core
		* clocks multiplied by 128.
		* clocks ([DevCTG] HRAW clocks) multiplied by 128.
		*
		*/
		static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
		{
		struct drm_device *dev = connector->base.dev;
		struct drm_i915_private *dev_priv = dev->dev_private;
		int clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
		int clock;

		if (IS_G4X(dev_priv))
		clock = MHz(intel_hrawclk(dev));
		else
		clock = 1000 * dev_priv->display.get_display_clock_speed(dev);

		return clock / (pwm_freq_hz * 128);
		}

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