Commit 83bdaad4 authored Mar 07, 2016 by Hubert Chrzaniuk Committed by Borislav Petkov Mar 07, 2016

EDAC, sb_edac: Fix logic when computing DIMM sizes on Xeon Phi



Correct a typo introduced by

  d0cdf900 ("EDAC, sb_edac: Add Knights Landing (Xeon Phi gen 2) support")

As a result under some configurations DIMMs were not correctly
recognized. Problem affects only Xeon Phi architecture.

Signed-off-by: Hubert Chrzaniuk <hubert.chrzaniuk@intel.com>
Acked-by: Aristeu Rozanski <aris@redhat.com>
Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: lukasz.anaczkowski@intel.com
Link: http://lkml.kernel.org/r/1457361045-26221-1-git-send-email-hubert.chrzaniuk@intel.com


Signed-off-by: Borislav Petkov <bp@suse.de>

parent f6cede5b

drivers/edac/sb_edac.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -1574,7 +1574,7 @@ static int knl_get_dimm_capacity(struct sbridge_pvt pvt, u64 mc_sizes)
		for (cha = 0; cha < KNL_MAX_CHAS; cha++) {
		if (knl_get_mc_route(target,
		mc_route_reg[cha]) == channel
		&& participants[channel]) {
		&& !participants[channel]) {
		participant_count++;
		participants[channel] = 1;
		break;

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