mtd: nand: brcmnand: Add support for flash-dma v0 (83156c1c) · Commits · 戴 / test

drivers/mtd/nand/raw/brcmnand/brcmnand.c

+19 −2

Original line number	Diff line number	Diff line
		@@ -117,6 +117,18 @@ enum flash_dma_reg {
		FLASH_DMA_CURRENT_DESC_EXT,
		};

		/* flash_dma registers v0*/
		static const u16 flash_dma_regs_v0[] = {
		[FLASH_DMA_REVISION] = 0x00,
		[FLASH_DMA_FIRST_DESC] = 0x04,
		[FLASH_DMA_CTRL] = 0x08,
		[FLASH_DMA_MODE] = 0x0c,
		[FLASH_DMA_STATUS] = 0x10,
		[FLASH_DMA_INTERRUPT_DESC] = 0x14,
		[FLASH_DMA_ERROR_STATUS] = 0x18,
		[FLASH_DMA_CURRENT_DESC] = 0x1c,
		};

		/* flash_dma registers v1*/
		static const u16 flash_dma_regs_v1[] = {
		[FLASH_DMA_REVISION] = 0x00,
		@@ -597,6 +609,8 @@ static void brcmnand_flash_dma_revision_init(struct brcmnand_controller *ctrl)
		/* flash_dma register offsets */
		if (ctrl->nand_version >= 0x0703)
		ctrl->flash_dma_offsets = flash_dma_regs_v4;
		else if (ctrl->nand_version == 0x0602)
		ctrl->flash_dma_offsets = flash_dma_regs_v0;
		else
		ctrl->flash_dma_offsets = flash_dma_regs_v1;
		}
		@@ -1673,8 +1687,11 @@ static void brcmnand_dma_run(struct brcmnand_host *host, dma_addr_t desc)

		flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC, lower_32_bits(desc));
		(void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC);
		flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT, upper_32_bits(desc));
		if (ctrl->nand_version > 0x0602) {
		flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT,
		upper_32_bits(desc));
		(void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT);
		}

		/* Start FLASH_DMA engine */
		ctrl->dma_pending = true;