Commit 83048ea7 authored by Takashi Iwai's avatar Takashi Iwai
Browse files

Merge tag 'asoc-3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next 

ASoC: Updates for v3.9

A fairly quiet release for ASoC:

- Support for a wider range of hardware in the compressed stream code.
- The ability to mute capture streams as well as playback streams while
  inactive.
- DT support for AK4642, FSI, Samsung I2S and WM8962.
- AC'97 support for Tegra.
- New driver for max98090, replacing the stub which was there.

Due to dependencies we've also got support for asynchronous I/O in regmap
and DTification of DMA support for Samsung platforms (used only by the
I2S driver and SPI) merged here as well.
parents e9a25e04 699ba454

Documentation/device-mapper/dm-raid.txt

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@@ -141,3 +141,4 @@ Version History 
1.2.0	Handle creation of arrays that contain failed devices.

1.3.0	Added support for RAID 10

1.3.1	Allow device replacement/rebuild for RAID 10

1.3.2   Fix/improve redundancy checking for RAID10

Documentation/devicetree/bindings/sound/ak4642.txt

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AK4642 I2C transmitter



This device supports I2C mode only.



Required properties:



  - compatible : "asahi-kasei,ak4642" or "asahi-kasei,ak4643" or "asahi-kasei,ak4648"

  - reg : The chip select number on the I2C bus



Example:



&i2c {

	ak4648: ak4648@0x12 {

		compatible = "asahi-kasei,ak4642";

		reg = <0x12>;

	};

};

Documentation/devicetree/bindings/sound/cs4271.txt

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@@ -20,6 +20,18 @@ Optional properties: 
		!RESET pin

 - cirrus,amuteb-eq-bmutec:	When given, the Codec's AMUTEB=BMUTEC flag

				is enabled.

 - cirrus,enable-soft-reset:

	The CS4271 requires its LRCLK and MCLK to be stable before its RESET

	line is de-asserted. That also means that clocks cannot be changed

	without putting the chip back into hardware reset, which also requires

	a complete re-initialization of all registers.



	One (undocumented) workaround is to assert and de-assert the PDN bit

	in the MODE2 register. This workaround can be enabled with this DT

	property.



	Note that this is not needed in case the clocks are stable

	throughout the entire runtime of the codec.



Examples:

Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.txt

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NVIDIA Tegra audio complex



Required properties:

- compatible : "nvidia,tegra-audio-wm9712"

- nvidia,model : The user-visible name of this sound complex.

- nvidia,audio-routing : A list of the connections between audio components.

  Each entry is a pair of strings, the first being the connection's sink,

  the second being the connection's source. Valid names for sources and

  sinks are the WM9712's pins, and the jacks on the board:



  WM9712 pins:



  * MONOOUT

  * HPOUTL

  * HPOUTR

  * LOUT2

  * ROUT2

  * OUT3

  * LINEINL

  * LINEINR

  * PHONE

  * PCBEEP

  * MIC1

  * MIC2

  * Mic Bias



  Board connectors:



  * Headphone

  * LineIn

  * Mic



- nvidia,ac97-controller : The phandle of the Tegra AC97 controller





Example:



sound {

	compatible = "nvidia,tegra-audio-wm9712-colibri_t20",

		         "nvidia,tegra-audio-wm9712";

	nvidia,model = "Toradex Colibri T20";



	nvidia,audio-routing =

		"Headphone", "HPOUTL",

		"Headphone", "HPOUTR",

		"LineIn", "LINEINL",

		"LineIn", "LINEINR",

		"Mic", "MIC1";



	nvidia,ac97-controller = <&ac97>;

};

Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt

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NVIDIA Tegra 20 AC97 controller



Required properties:

- compatible : "nvidia,tegra20-ac97"

- reg : Should contain AC97 controller registers location and length

- interrupts : Should contain AC97 interrupt

- nvidia,dma-request-selector : The Tegra DMA controller's phandle and

  request selector for the AC97 controller

- nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number

  of the GPIO used to reset the external AC97 codec

- nvidia,codec-sync-gpio : The Tegra GPIO controller's phandle and the number

  of the GPIO corresponding with the AC97 DAP _FS line

Example:



ac97@70002000 {

	compatible = "nvidia,tegra20-ac97";

	reg = <0x70002000 0x200>;

	interrupts = <0 81 0x04>;

	nvidia,dma-request-selector = <&apbdma 12>;

	nvidia,codec-reset-gpio = <&gpio 170 0>;

	nvidia,codec-sync-gpio = <&gpio 120 0>;

};

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