Documentation: bindings: brcmstb: Document write-pairing

    - compatible: "brcm,bcm<chip_id>-hif-cpubiuctrl", "syscon"

    - compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon"

hif-cpubiuctrl node

-------------------

SoCs with Broadcom Brahma15 ARM-based CPUs have a specific Bus Interface Unit

(BIU) block which controls and interfaces the CPU complex to the different

Memory Controller Ports (MCP), one per memory controller (MEMC). This BIU block

offers a feature called Write Pairing which consists in collapsing two adjacent

cache lines into a single (bursted) write transaction towards the memory

controller (MEMC) to maximize write bandwidth.

Required properties:

    - compatible: must be "brcm,bcm7445-hif-cpubiuctrl", "syscon"

Optional properties:

    - brcm,write-pairing:

	Boolean property, which when present indicates that the chip

	supports write-pairing.

example:

    rdb {

        #address-cells = <1>;

        hif_cpubiuctrl: syscon@3e2400 {

            compatible = "brcm,bcm7445-hif-cpubiuctrl", "syscon";

            reg = <0x3e2400 0x5b4>;

            brcm,write-pairing;

        };

        hif_continuation: syscon@452000 {