Commit 82d9beb4 authored by Hans de Goede's avatar Hans de Goede Committed by Andy Shevchenko
Browse files

pinctrl: cherryview: Split out irq hw-init into a separate helper function 



Split out irq hw-init into a separate chv_gpio_irq_init_hw() function.
This is a preparation patch for passing the irqchip when adding the
gpiochip.

Acked-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
parent ca8a958e

drivers/pinctrl/intel/pinctrl-cherryview.c

+27 −18
Original line number Diff line number Diff line
@@ -1555,6 +1555,32 @@ static void chv_init_irq_valid_mask(struct gpio_chip *chip, 
	}

}



static int chv_gpio_irq_init_hw(struct gpio_chip *chip)

{

	struct chv_pinctrl *pctrl = gpiochip_get_data(chip);



	/*

	 * The same set of machines in chv_no_valid_mask[] have incorrectly

	 * configured GPIOs that generate spurious interrupts so we use

	 * this same list to apply another quirk for them.

	 *

	 * See also https://bugzilla.kernel.org/show_bug.cgi?id=197953.

	 */

	if (!pctrl->chip.irq.init_valid_mask) {

		/*

		 * Mask all interrupts the community is able to generate

		 * but leave the ones that can only generate GPEs unmasked.

		 */

		chv_writel(GENMASK(31, pctrl->community->nirqs),

			   pctrl->regs + CHV_INTMASK);

	}



	/* Clear all interrupts */

	chv_writel(0xffff, pctrl->regs + CHV_INTSTAT);



	return 0;

}



static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)

{

	const struct chv_gpio_pinrange *range;
@@ -1589,24 +1615,7 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq) 
		}

	}



	/*

	 * The same set of machines in chv_no_valid_mask[] have incorrectly

	 * configured GPIOs that generate spurious interrupts so we use

	 * this same list to apply another quirk for them.

	 *

	 * See also https://bugzilla.kernel.org/show_bug.cgi?id=197953.

	 */

	if (!need_valid_mask) {

		/*

		 * Mask all interrupts the community is able to generate

		 * but leave the ones that can only generate GPEs unmasked.

		 */

		chv_writel(GENMASK(31, pctrl->community->nirqs),

			   pctrl->regs + CHV_INTMASK);

	}



	/* Clear all interrupts */

	chv_writel(0xffff, pctrl->regs + CHV_INTSTAT);

	chv_gpio_irq_init_hw(chip);



	if (!need_valid_mask) {

		irq_base = devm_irq_alloc_descs(pctrl->dev, -1, 0,

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