Commit 819723a8 authored by Michael Ellerman's avatar Michael Ellerman
Browse files

Merge branch 'fixes' into next

Merge in our fixes branch. In particular we want to merge the TM and KUAP fixes,
so we can add selftests for them in next.
parents 247257b0 59bee45b
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+5 −0
Original line number Diff line number Diff line
@@ -295,8 +295,13 @@ static inline bool pfn_valid(unsigned long pfn)
/*
 * Some number of bits at the level of the page table that points to
 * a hugepte are used to encode the size.  This masks those bits.
 * On 8xx, HW assistance requires 4k alignment for the hugepte.
 */
#ifdef CONFIG_PPC_8xx
#define HUGEPD_SHIFT_MASK     0xfff
#else
#define HUGEPD_SHIFT_MASK     0x3f
#endif

#ifndef __ASSEMBLY__

+4 −0
Original line number Diff line number Diff line
@@ -168,6 +168,10 @@ struct thread_struct {
	unsigned long	srr1;
	unsigned long	dar;
	unsigned long	dsisr;
#ifdef CONFIG_PPC_BOOK3S_32
	unsigned long	r0, r3, r4, r5, r6, r8, r9, r11;
	unsigned long	lr, ctr;
#endif
#endif
	/* Debug Registers */
	struct debug_reg debug;
+12 −0
Original line number Diff line number Diff line
@@ -132,6 +132,18 @@ int main(void)
	OFFSET(SRR1, thread_struct, srr1);
	OFFSET(DAR, thread_struct, dar);
	OFFSET(DSISR, thread_struct, dsisr);
#ifdef CONFIG_PPC_BOOK3S_32
	OFFSET(THR0, thread_struct, r0);
	OFFSET(THR3, thread_struct, r3);
	OFFSET(THR4, thread_struct, r4);
	OFFSET(THR5, thread_struct, r5);
	OFFSET(THR6, thread_struct, r6);
	OFFSET(THR8, thread_struct, r8);
	OFFSET(THR9, thread_struct, r9);
	OFFSET(THR11, thread_struct, r11);
	OFFSET(THLR, thread_struct, lr);
	OFFSET(THCTR, thread_struct, ctr);
#endif
#endif
#ifdef CONFIG_SPE
	OFFSET(THREAD_EVR0, thread_struct, evr[0]);
+3 −1
Original line number Diff line number Diff line
@@ -2193,11 +2193,13 @@ static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
		 * oprofile_cpu_type already has a value, then we are
		 * possibly overriding a real PVR with a logical one,
		 * and, in that case, keep the current value for
		 * oprofile_cpu_type.
		 * oprofile_cpu_type. Futhermore, let's ensure that the
		 * fix for the PMAO bug is enabled on compatibility mode.
		 */
		if (old.oprofile_cpu_type != NULL) {
			t->oprofile_cpu_type = old.oprofile_cpu_type;
			t->oprofile_type = old.oprofile_type;
			t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG;
		}
	}

+11 −10
Original line number Diff line number Diff line
@@ -1184,14 +1184,6 @@ void eeh_handle_special_event(void)
			eeh_pe_state_mark(pe, EEH_PE_RECOVERING);
			eeh_handle_normal_event(pe);
		} else {
			pci_lock_rescan_remove();
			list_for_each_entry(hose, &hose_list, list_node) {
				phb_pe = eeh_phb_pe_get(hose);
				if (!phb_pe ||
				    !(phb_pe->state & EEH_PE_ISOLATED) ||
				    (phb_pe->state & EEH_PE_RECOVERING))
					continue;

			eeh_for_each_pe(pe, tmp_pe)
				eeh_pe_for_each_dev(tmp_pe, edev, tmp_edev)
					edev->mode &= ~EEH_DEV_NO_HANDLER;
@@ -1202,6 +1194,15 @@ void eeh_handle_special_event(void)
			eeh_pe_report(
				"error_detected(permanent failure)", pe,
				eeh_report_failure, NULL);

			pci_lock_rescan_remove();
			list_for_each_entry(hose, &hose_list, list_node) {
				phb_pe = eeh_phb_pe_get(hose);
				if (!phb_pe ||
				    !(phb_pe->state & EEH_PE_ISOLATED) ||
				    (phb_pe->state & EEH_PE_RECOVERING))
					continue;

				bus = eeh_pe_bus_get(phb_pe);
				if (!bus) {
					pr_err("%s: Cannot find PCI bus for "
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