Commit 81867496 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-next-2020-08-06' of git://anongit.freedesktop.org/drm/drm 

Pull drm updates from Dave Airlie:
 "New xilinx displayport driver, AMD support for two new GPUs (more
  header files), i915 initial support for RocketLake and some work on
  their DG1 (discrete chip).

  The core also grew some lockdep annotations to try and constrain what
  drivers do with dma-fences, and added some documentation on why the
  idea of indefinite fences doesn't work.

  The long list is below.

  I do have some fixes trees outstanding, but I'll follow up with those
  later.

  core:
   - add user def flag to cmd line modes
   - dma_fence_wait added might_sleep
   - dma-fence lockdep annotations
   - indefinite fences are bad documentation
   - gem CMA functions used in more drivers
   - struct mutex removal
   - more drm_ debug macro usage
   - set/drop master api fixes
   - fix for drm/mm hole size comparison
   - drm/mm remove invalid entry optimization
   - optimise drm/mm hole handling
   - VRR debugfs added
   - uncompressed AFBC modifier support
   - multiple display id blocks in EDID
   - multiple driver sg handling fixes
   - __drm_atomic_helper_crtc_reset in all drivers
   - managed vram helpers

  ttm:
   - ttm_mem_reg handling cleanup
   - remove bo offset field
   - drop CMA memtype flag
   - drop mappable flag

  xilinx:
   - New Xilinx ZynqMP DisplayPort Subsystem driver

  nouveau:
   - add CRC support
   - start using NVIDIA published class header files
   - convert all push buffer emission to new macros
   - Proper push buffer space management for EVO/NVD channels.
   - firmware loading fixes
   - 2MiB system memory pages support on Pascal and newer

  vkms:
   - larger cursor support

  i915:
   - Rocketlake platform enablement
   - Early DG1 enablement
   - Numerous GEM refactorings
   - DP MST fixes
   - FBC, PSR, Cursor, Color, Gamma fixes
   - TGL, RKL, EHL workaround updates
   - TGL 8K display support fixes
   - SDVO/HDMI/DVI fixes

  amdgpu:
   - Initial support for Sienna Cichlid GPU
   - Initial support for Navy Flounder GPU
   - SI UVD/VCE support
   - expose rotation property
   - Add support for unique id on Arcturus
   - Enable runtime PM on vega10 boards that support BACO
   - Skip BAR resizing if the bios already did id
   - Major swSMU code cleanup
   - Fixes for DCN bandwidth calculations

  amdkfd:
   - Track SDMA usage per process
   - SMI events interface

  radeon:
   - Default to on chip GART for AGP boards on all arches
   - Runtime PM reference count fixes

  msm:
   - headers regenerated causing churn
   - a650/a640 display and GPU enablement
   - dpu dither support for 6bpc panels
   - dpu cursor fix
   - dsi/mdp5 enablement for sdm630/sdm636/sdm66

  tegra:
   - video capture prep support
   - reflection support

  mediatek:
   - convert mtk_dsi to bridge API

  meson:
   - FBC support

  sun4i:
   - iommu support

  rockchip:
   - register locking fix
   - per-pixel alpha support PX30 VOP

  mgag200:
   - ported to simple and shmem helpers
   - device init cleanups
   - use managed pci functions
   - dropped hw cursor support

  ast:
   - use managed pci functions
   - use managed VRAM helpers
   - rework cursor support

  malidp:
   - dev_groups support

  hibmc:
   - refactor hibmc_drv_vdac:

  vc4:
   - create TXP CRTC

  imx:
   - error path fixes and cleanups

  etnaviv:
   - clock handling and error handling cleanups
   - use pin_user_pages"

* tag 'drm-next-2020-08-06' of git://anongit.freedesktop.org/drm/drm: (1747 commits)
  drm/msm: use kthread_create_worker instead of kthread_run
  drm/msm/mdp5: Add MDP5 configuration for SDM636/660
  drm/msm/dsi: Add DSI configuration for SDM660
  drm/msm/mdp5: Add MDP5 configuration for SDM630
  drm/msm/dsi: Add phy configuration for SDM630/636/660
  drm/msm/a6xx: add A640/A650 hwcg
  drm/msm/a6xx: hwcg tables in gpulist
  drm/msm/dpu: add SM8250 to hw catalog
  drm/msm/dpu: add SM8150 to hw catalog
  drm/msm/dpu: intf timing path for displayport
  drm/msm/dpu: set missing flush bits for INTF_2 and INTF_3
  drm/msm/dpu: don't use INTF_INPUT_CTRL feature on sdm845
  drm/msm/dpu: move some sspp caps to dpu_caps
  drm/msm/dpu: update UBWC config for sm8150 and sm8250
  drm/msm/dpu: use right setup_blend_config for sm8150 and sm8250
  drm/msm/a6xx: set ubwc config for A640 and A650
  drm/msm/adreno: un-open-code some packets
  drm/msm: sync generated headers
  drm/msm/a6xx: add build_bw_table for A640/A650
  drm/msm/a6xx: fix crashstate capture for A650
  ...
parents e4a7b2dc dc100bc8

Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml

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@@ -36,6 +36,9 @@ properties: 
      - const: bus

      - const: mod



  iommus:

    maxItems: 1



  resets:

    maxItems: 1

Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt

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Broadcom VC4 (VideoCore4) GPU



The VC4 device present on the Raspberry Pi includes a display system

with HDMI output and the HVS (Hardware Video Scaler) for compositing

display planes.



Required properties for VC4:

- compatible:	Should be "brcm,bcm2835-vc4" or "brcm,cygnus-vc4"



Required properties for Pixel Valve:

- compatible:	Should be one of "brcm,bcm2835-pixelvalve0",

		  "brcm,bcm2835-pixelvalve1", or "brcm,bcm2835-pixelvalve2"

- reg:		Physical base address and length of the PV's registers

- interrupts:	The interrupt number

		  See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt



Required properties for HVS:

- compatible:	Should be "brcm,bcm2835-hvs"

- reg:		Physical base address and length of the HVS's registers

- interrupts:	The interrupt number

		  See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt



Required properties for HDMI

- compatible:	Should be "brcm,bcm2835-hdmi"

- reg:		Physical base address and length of the two register ranges

		  ("HDMI" and "HD", in that order)

- interrupts:	The interrupt numbers

		  See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt

- ddc:		phandle of the I2C controller used for DDC EDID probing

- clocks:	a) hdmi: The HDMI state machine clock

		b) pixel: The pixel clock.



Optional properties for HDMI:

- hpd-gpios:	The GPIO pin for HDMI hotplug detect (if it doesn't appear

		  as an interrupt/status bit in the HDMI controller

		  itself).  See bindings/pinctrl/brcm,bcm2835-gpio.txt

- dmas:		Should contain one entry pointing to the DMA channel used to

		transfer audio data

- dma-names:	Should contain "audio-rx"



Required properties for DPI:

- compatible:	Should be "brcm,bcm2835-dpi"

- reg:		Physical base address and length of the registers

- clocks:	a) core: The core clock the unit runs on

		b) pixel: The pixel clock that feeds the pixelvalve

- port:		Port node with a single endpoint connecting to the panel

		  device, as defined in [1]



Required properties for VEC:

- compatible:	Should be "brcm,bcm2835-vec"

- reg:		Physical base address and length of the registers

- clocks:	The core clock the unit runs on

- interrupts:	The interrupt number

		  See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt



Required properties for V3D:

- compatible:	Should be "brcm,bcm2835-v3d" or "brcm,cygnus-v3d"

- reg:		Physical base address and length of the V3D's registers

- interrupts:	The interrupt number

		  See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt



Optional properties for V3D:

- clocks:	The clock the unit runs on



Required properties for DSI:

- compatible:	Should be "brcm,bcm2835-dsi0" or "brcm,bcm2835-dsi1"

- reg:		Physical base address and length of the DSI block's registers

- interrupts:	The interrupt number

		  See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt

- clocks:	a) phy: The DSI PLL clock feeding the DSI analog PHY

		b) escape: The DSI ESC clock from CPRMAN

		c) pixel: The DSI pixel clock from CPRMAN

- clock-output-names:

		The 3 clocks output from the DSI analog PHY: dsi[01]_byte,

		dsi[01]_ddr2, and dsi[01]_ddr



Required properties for the TXP (writeback) block:

- compatible:	Should be "brcm,bcm2835-txp"

- reg:		Physical base address and length of the TXP block's registers

- interrupts:	The interrupt number

		  See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt



[1] Documentation/devicetree/bindings/media/video-interfaces.txt



Example:

pixelvalve@7e807000 {

	compatible = "brcm,bcm2835-pixelvalve2";

	reg = <0x7e807000 0x100>;

	interrupts = <2 10>; /* pixelvalve */

};



hvs@7e400000 {

	compatible = "brcm,bcm2835-hvs";

	reg = <0x7e400000 0x6000>;

	interrupts = <2 1>;

};



hdmi: hdmi@7e902000 {

	compatible = "brcm,bcm2835-hdmi";

	reg = <0x7e902000 0x600>,

	      <0x7e808000 0x100>;

	interrupts = <2 8>, <2 9>;

	ddc = <&i2c2>;

	hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;

	clocks = <&clocks BCM2835_PLLH_PIX>,

		 <&clocks BCM2835_CLOCK_HSM>;

	clock-names = "pixel", "hdmi";

};



dpi: dpi@7e208000 {

	compatible = "brcm,bcm2835-dpi";

	reg = <0x7e208000 0x8c>;

	clocks = <&clocks BCM2835_CLOCK_VPU>,

	         <&clocks BCM2835_CLOCK_DPI>;

	clock-names = "core", "pixel";

	#address-cells = <1>;

	#size-cells = <0>;



	port {

		dpi_out: endpoint@0 {

			remote-endpoint = <&panel_in>;

		};

	};

};



dsi1: dsi@7e700000 {

	compatible = "brcm,bcm2835-dsi1";

	reg = <0x7e700000 0x8c>;

	interrupts = <2 12>;

	#address-cells = <1>;

	#size-cells = <0>;

	#clock-cells = <1>;



	clocks = <&clocks BCM2835_PLLD_DSI1>,

		 <&clocks BCM2835_CLOCK_DSI1E>,

		 <&clocks BCM2835_CLOCK_DSI1P>;

	clock-names = "phy", "escape", "pixel";



	clock-output-names = "dsi1_byte", "dsi1_ddr2", "dsi1_ddr";



	pitouchscreen: panel@0 {

		compatible = "raspberrypi,touchscreen";

		reg = <0>;



		<...>

	};

};



vec: vec@7e806000 {

	compatible = "brcm,bcm2835-vec";

	reg = <0x7e806000 0x1000>;

	clocks = <&clocks BCM2835_CLOCK_VEC>;

	interrupts = <2 27>;

};



v3d: v3d@7ec00000 {

	compatible = "brcm,bcm2835-v3d";

	reg = <0x7ec00000 0x1000>;

	interrupts = <1 10>;

};



vc4: gpu {

	compatible = "brcm,bcm2835-vc4";

};



panel: panel {

	compatible = "ontat,yx700wv03", "simple-panel";



	port {

		panel_in: endpoint {

			remote-endpoint = <&dpi_out>;

		};

	};

};

Documentation/devicetree/bindings/display/brcm,bcm2835-dpi.yaml

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# SPDX-License-Identifier: GPL-2.0

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/brcm,bcm2835-dpi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Broadcom VC4 (VideoCore4) DPI Controller



maintainers:

  - Eric Anholt <eric@anholt.net>



properties:

  compatible:

    const: brcm,bcm2835-dpi



  reg:

    maxItems: 1



  clocks:

    items:

      - description: The core clock the unit runs on

      - description: The pixel clock that feeds the pixelvalve



  clock-names:

    items:

      - const: core

      - const: pixel



  port:

    type: object

    description: >

      Port node with a single endpoint connecting to the panel, as

      defined in Documentation/devicetree/bindings/media/video-interfaces.txt.



required:

  - compatible

  - reg

  - clocks

  - clock-names

  - port



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/bcm2835.h>



    dpi: dpi@7e208000 {

        compatible = "brcm,bcm2835-dpi";

        reg = <0x7e208000 0x8c>;

        clocks = <&clocks BCM2835_CLOCK_VPU>,

                 <&clocks BCM2835_CLOCK_DPI>;

        clock-names = "core", "pixel";



        port {

            dpi_out: endpoint {

                remote-endpoint = <&panel_in>;

            };

        };

    };



...

Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml

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# SPDX-License-Identifier: GPL-2.0

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/brcm,bcm2835-dsi0.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Broadcom VC4 (VideoCore4) DSI Controller



maintainers:

  - Eric Anholt <eric@anholt.net>



properties:

  "#clock-cells":

    const: 1



  compatible:

    enum:

      - brcm,bcm2835-dsi0

      - brcm,bcm2835-dsi1



  reg:

    maxItems: 1



  clocks:

    items:

      - description: The DSI PLL clock feeding the DSI analog PHY

      - description: The DSI ESC clock

      - description: The DSI pixel clock



  clock-names:

    items:

      - const: phy

      - const: escape

      - const: pixel



  clock-output-names: true

    # FIXME: The meta-schemas don't seem to allow it for now

    # items:

    #   - description: The DSI byte clock for the PHY

    #   - description: The DSI DDR2 clock

    #   - description: The DSI DDR clock



  interrupts:

    maxItems: 1



required:

  - "#clock-cells"

  - compatible

  - reg

  - clocks

  - clock-names

  - clock-output-names

  - interrupts



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/bcm2835.h>



    dsi1: dsi@7e700000 {

        compatible = "brcm,bcm2835-dsi1";

        reg = <0x7e700000 0x8c>;

        interrupts = <2 12>;

        #address-cells = <1>;

        #size-cells = <0>;

        #clock-cells = <1>;



        clocks = <&clocks BCM2835_PLLD_DSI1>,

                 <&clocks BCM2835_CLOCK_DSI1E>,

                 <&clocks BCM2835_CLOCK_DSI1P>;

        clock-names = "phy", "escape", "pixel";



        clock-output-names = "dsi1_byte", "dsi1_ddr2", "dsi1_ddr";



        pitouchscreen: panel@0 {

            compatible = "raspberrypi,touchscreen";

            reg = <0>;



            /* ... */

        };

    };



...

Documentation/devicetree/bindings/display/brcm,bcm2835-hdmi.yaml

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# SPDX-License-Identifier: GPL-2.0

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/brcm,bcm2835-hdmi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Broadcom VC4 (VideoCore4) HDMI Controller



maintainers:

  - Eric Anholt <eric@anholt.net>



properties:

  compatible:

    const: brcm,bcm2835-hdmi



  reg:

    items:

      - description: HDMI register range

      - description: HD register range



  interrupts:

    minItems: 2



  clocks:

    items:

      - description: The pixel clock

      - description: The HDMI state machine clock



  clock-names:

    items:

      - const: pixel

      - const: hdmi



  ddc:

    allOf:

      - $ref: /schemas/types.yaml#/definitions/phandle

    description: >

      Phandle of the I2C controller used for DDC EDID probing



  hpd-gpios:

    description: >

      The GPIO pin for the HDMI hotplug detect (if it doesn't appear

      as an interrupt/status bit in the HDMI controller itself)



  dmas:

    maxItems: 1

    description: >

      Should contain one entry pointing to the DMA channel used to

      transfer audio data.



  dma-names:

    const: audio-rx



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - ddc



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/bcm2835.h>

    #include <dt-bindings/gpio/gpio.h>



    hdmi: hdmi@7e902000 {

        compatible = "brcm,bcm2835-hdmi";

        reg = <0x7e902000 0x600>,

              <0x7e808000 0x100>;

        interrupts = <2 8>, <2 9>;

        ddc = <&i2c2>;

        hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;

        clocks = <&clocks BCM2835_PLLH_PIX>,

                 <&clocks BCM2835_CLOCK_HSM>;

        clock-names = "pixel", "hdmi";

    };



...

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