Commit 812ad49d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv/for-v5.4-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux 

Pull RISC-V fixes from Paul Walmsley:

 - Ensure that exclusive-load reservations are terminated after system
   call or exception handling. This primarily affects QEMU, which does
   not expire load reservations.

 - Fix an issue primarily affecting RV32 platforms that can cause the DT
   header to be corrupted, causing boot failures.

* tag 'riscv/for-v5.4-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: Fix memblock reservation for device tree blob
  RISC-V: Clear load reservations while restoring hart contexts
parents a4ad51e9 922b0375

arch/riscv/include/asm/asm.h

+1 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 


#define REG_L		__REG_SEL(ld, lw)

#define REG_S		__REG_SEL(sd, sw)

#define REG_SC		__REG_SEL(sc.d, sc.w)

#define SZREG		__REG_SEL(8, 4)

#define LGREG		__REG_SEL(3, 2)

arch/riscv/kernel/entry.S

+20 −1
Original line number Diff line number Diff line
@@ -98,7 +98,26 @@ _save_context: 
 */

	.macro RESTORE_ALL

	REG_L a0, PT_SSTATUS(sp)

	/*

	 * The current load reservation is effectively part of the processor's

	 * state, in the sense that load reservations cannot be shared between

	 * different hart contexts.  We can't actually save and restore a load

	 * reservation, so instead here we clear any existing reservation --

	 * it's always legal for implementations to clear load reservations at

	 * any point (as long as the forward progress guarantee is kept, but

	 * we'll ignore that here).

	 *

	 * Dangling load reservations can be the result of taking a trap in the

	 * middle of an LR/SC sequence, but can also be the result of a taken

	 * forward branch around an SC -- which is how we implement CAS.  As a

	 * result we need to clear reservations between the last CAS and the

	 * jump back to the new context.  While it is unlikely the store

	 * completes, implementations are allowed to expand reservations to be

	 * arbitrarily large.

	 */

	REG_L  a2, PT_SEPC(sp)

	REG_SC x0, a2, PT_SEPC(sp)



	csrw CSR_SSTATUS, a0

	csrw CSR_SEPC, a2

arch/riscv/mm/init.c

+11 −1
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include <linux/swap.h>

#include <linux/sizes.h>

#include <linux/of_fdt.h>

#include <linux/libfdt.h>



#include <asm/fixmap.h>

#include <asm/tlbflush.h>
@@ -82,6 +83,8 @@ disable: 
}

#endif /* CONFIG_BLK_DEV_INITRD */



static phys_addr_t dtb_early_pa __initdata;



void __init setup_bootmem(void)

{

	struct memblock_region *reg;
@@ -117,7 +120,12 @@ void __init setup_bootmem(void) 
	setup_initrd();

#endif /* CONFIG_BLK_DEV_INITRD */



	early_init_fdt_reserve_self();

	/*

	 * Avoid using early_init_fdt_reserve_self() since __pa() does

	 * not work for DTB pointers that are fixmap addresses

	 */

	memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));



	early_init_fdt_scan_reserved_mem();

	memblock_allow_resize();

	memblock_dump_all();
@@ -393,6 +401,8 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa) 


	/* Save pointer to DTB for early FDT parsing */

	dtb_early_va = (void *)fix_to_virt(FIX_FDT) + (dtb_pa & ~PAGE_MASK);

	/* Save physical address for memblock reservation */

	dtb_early_pa = dtb_pa;

}



static void __init setup_vm_final(void)

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