Commit 811e7c87 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

Merge tag 'for-v3.13/am43xx-support' of... 

Merge tag 'for-v3.13/am43xx-support' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.13/hwmod

Add hwmod and PRCM data for the TI AM43xx family of SoCs.

Under normal circumstances, these patches would not be merged.
The hwmod and PRCM data should be moved out either to DT data or
to drivers/.  Also, the current implementation trades off lines
of diff by dynamically rewriting static data at runtime, which is
a bad practice - it causes future maintenance headaches.
However, after speaking with my upstream, it sounds like it's
better to merge these patches in their current state, due to long
term considerations.

Basic test logs are here:

http://www.pwsan.com/omap/testlogs/am43xx_support_v3.13/20131015213706/

Due to the lack of an AM43xx board and any available public
documentation, it's impossible for me to review or test that
platform in any meaningful way.  But at least the tests above
verify that the patches don't affect existing platforms -
particularly AM33xx.
parents 254f57a9 70b0d5f5

arch/arm/mach-omap2/Makefile

+8 −1
Original line number Diff line number Diff line
@@ -112,13 +112,13 @@ obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o 
obj-$(CONFIG_ARCH_OMAP3)		+= prm2xxx_3xxx.o prm3xxx.o cm3xxx.o

obj-$(CONFIG_ARCH_OMAP3)		+= vc3xxx_data.o vp3xxx_data.o

obj-$(CONFIG_SOC_AM33XX)		+= prm33xx.o cm33xx.o

obj-$(CONFIG_SOC_AM43XX)		+= prm33xx.o cm33xx.o

omap-prcm-4-5-common			=  cminst44xx.o cm44xx.o prm44xx.o \

					   prcm_mpu44xx.o prminst44xx.o \

					   vc44xx_data.o vp44xx_data.o

obj-$(CONFIG_ARCH_OMAP4)		+= $(omap-prcm-4-5-common)

obj-$(CONFIG_SOC_OMAP5)			+= $(omap-prcm-4-5-common)

obj-$(CONFIG_SOC_DRA7XX)		+= $(omap-prcm-4-5-common)

obj-$(CONFIG_SOC_AM43XX)		+= $(omap-prcm-4-5-common)



# OMAP voltage domains

voltagedomain-common			:= voltage.o vc.o vp.o
@@ -146,6 +146,7 @@ obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o 
obj-$(CONFIG_SOC_AM33XX)		+= $(powerdomain-common)

obj-$(CONFIG_SOC_AM33XX)		+= powerdomains33xx_data.o

obj-$(CONFIG_SOC_AM43XX)		+= $(powerdomain-common)

obj-$(CONFIG_SOC_AM43XX)		+= powerdomains43xx_data.o

obj-$(CONFIG_SOC_OMAP5)			+= $(powerdomain-common)

obj-$(CONFIG_SOC_OMAP5)			+= powerdomains54xx_data.o

obj-$(CONFIG_SOC_DRA7XX)		+= $(powerdomain-common)
@@ -165,6 +166,7 @@ obj-$(CONFIG_ARCH_OMAP4) += clockdomains44xx_data.o 
obj-$(CONFIG_SOC_AM33XX)		+= $(clockdomain-common)

obj-$(CONFIG_SOC_AM33XX)		+= clockdomains33xx_data.o

obj-$(CONFIG_SOC_AM43XX)		+= $(clockdomain-common)

obj-$(CONFIG_SOC_AM43XX)		+= clockdomains43xx_data.o

obj-$(CONFIG_SOC_OMAP5)			+= $(clockdomain-common)

obj-$(CONFIG_SOC_OMAP5)			+= clockdomains54xx_data.o

obj-$(CONFIG_SOC_DRA7XX)		+= $(clockdomain-common)
@@ -210,6 +212,11 @@ obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o 
obj-$(CONFIG_ARCH_OMAP3)		+= omap_hwmod_2xxx_3xxx_interconnect_data.o

obj-$(CONFIG_ARCH_OMAP3)		+= omap_hwmod_3xxx_data.o

obj-$(CONFIG_SOC_AM33XX)		+= omap_hwmod_33xx_data.o

obj-$(CONFIG_SOC_AM33XX)		+= omap_hwmod_33xx_43xx_interconnect_data.o

obj-$(CONFIG_SOC_AM33XX)		+= omap_hwmod_33xx_43xx_ipblock_data.o

obj-$(CONFIG_SOC_AM43XX)		+= omap_hwmod_43xx_data.o

obj-$(CONFIG_SOC_AM43XX)		+= omap_hwmod_33xx_43xx_interconnect_data.o

obj-$(CONFIG_SOC_AM43XX)		+= omap_hwmod_33xx_43xx_ipblock_data.o

obj-$(CONFIG_ARCH_OMAP4)		+= omap_hwmod_44xx_data.o

obj-$(CONFIG_SOC_OMAP5)			+= omap_hwmod_54xx_data.o

obj-$(CONFIG_SOC_DRA7XX)		+= omap_hwmod_7xx_data.o

arch/arm/mach-omap2/clockdomain.h

+3 −1
Original line number Diff line number Diff line
@@ -132,7 +132,7 @@ struct clockdomain { 
	u8 _flags;

	const u8 dep_bit;

	const u8 prcm_partition;

	const s16 cm_inst;

	const u16 cm_inst;

	const u16 clkdm_offs;

	struct clkdm_dep *wkdep_srcs;

	struct clkdm_dep *sleepdep_srcs;
@@ -218,6 +218,7 @@ extern void __init am33xx_clockdomains_init(void); 
extern void __init omap44xx_clockdomains_init(void);

extern void __init omap54xx_clockdomains_init(void);

extern void __init dra7xx_clockdomains_init(void);

void am43xx_clockdomains_init(void);



extern void clkdm_add_autodeps(struct clockdomain *clkdm);

extern void clkdm_del_autodeps(struct clockdomain *clkdm);
@@ -226,6 +227,7 @@ extern struct clkdm_ops omap2_clkdm_operations; 
extern struct clkdm_ops omap3_clkdm_operations;

extern struct clkdm_ops omap4_clkdm_operations;

extern struct clkdm_ops am33xx_clkdm_operations;

extern struct clkdm_ops am43xx_clkdm_operations;



extern struct clkdm_dep gfx_24xx_wkdeps[];

extern struct clkdm_dep dsp_24xx_wkdeps[];

arch/arm/mach-omap2/clockdomains43xx_data.c

0 → 100644
+196 −0
Original line number Diff line number Diff line 
/*

 * AM43xx Clock domains framework

 *

 * Copyright (C) 2013 Texas Instruments, Inc.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



#include <linux/kernel.h>

#include <linux/io.h>



#include "clockdomain.h"

#include "prcm44xx.h"

#include "prcm43xx.h"



static struct clockdomain l4_cefuse_43xx_clkdm = {

	.name		  = "l4_cefuse_clkdm",

	.pwrdm		  = { .name = "cefuse_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_CEFUSE_INST,

	.clkdm_offs	  = AM43XX_CM_CEFUSE_CEFUSE_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain mpu_43xx_clkdm = {

	.name		  = "mpu_clkdm",

	.pwrdm		  = { .name = "mpu_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_MPU_INST,

	.clkdm_offs	  = AM43XX_CM_MPU_MPU_CDOFFS,

	.flags		  = CLKDM_CAN_HWSUP_SWSUP,

};



static struct clockdomain l4ls_43xx_clkdm = {

	.name		  = "l4ls_clkdm",

	.pwrdm		  = { .name = "per_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_PER_INST,

	.clkdm_offs	  = AM43XX_CM_PER_L4LS_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain tamper_43xx_clkdm = {

	.name		  = "tamper_clkdm",

	.pwrdm		  = { .name = "tamper_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_TAMPER_INST,

	.clkdm_offs	  = AM43XX_CM_TAMPER_TAMPER_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain l4_rtc_43xx_clkdm = {

	.name		  = "l4_rtc_clkdm",

	.pwrdm		  = { .name = "rtc_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_RTC_INST,

	.clkdm_offs	  = AM43XX_CM_RTC_RTC_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain pruss_ocp_43xx_clkdm = {

	.name		  = "pruss_ocp_clkdm",

	.pwrdm		  = { .name = "per_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_PER_INST,

	.clkdm_offs	  = AM43XX_CM_PER_ICSS_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain ocpwp_l3_43xx_clkdm = {

	.name		  = "ocpwp_l3_clkdm",

	.pwrdm		  = { .name = "per_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_PER_INST,

	.clkdm_offs	  = AM43XX_CM_PER_OCPWP_L3_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain l3s_tsc_43xx_clkdm = {

	.name		  = "l3s_tsc_clkdm",

	.pwrdm		  = { .name = "wkup_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_WKUP_INST,

	.clkdm_offs	  = AM43XX_CM_WKUP_L3S_TSC_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain dss_43xx_clkdm = {

	.name		  = "dss_clkdm",

	.pwrdm		  = { .name = "per_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_PER_INST,

	.clkdm_offs	  = AM43XX_CM_PER_DSS_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain l3_aon_43xx_clkdm = {

	.name		  = "l3_aon_clkdm",

	.pwrdm		  = { .name = "wkup_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_WKUP_INST,

	.clkdm_offs	  = AM43XX_CM_WKUP_L3_AON_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain emif_43xx_clkdm = {

	.name		  = "emif_clkdm",

	.pwrdm		  = { .name = "per_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_PER_INST,

	.clkdm_offs	  = AM43XX_CM_PER_EMIF_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain l4_wkup_aon_43xx_clkdm = {

	.name		  = "l4_wkup_aon_clkdm",

	.pwrdm		  = { .name = "wkup_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_WKUP_INST,

	.clkdm_offs	  = AM43XX_CM_WKUP_L4_WKUP_AON_CDOFFS,

};



static struct clockdomain l3_43xx_clkdm = {

	.name		  = "l3_clkdm",

	.pwrdm		  = { .name = "per_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_PER_INST,

	.clkdm_offs	  = AM43XX_CM_PER_L3_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain l4_wkup_43xx_clkdm = {

	.name		  = "l4_wkup_clkdm",

	.pwrdm		  = { .name = "wkup_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_WKUP_INST,

	.clkdm_offs	  = AM43XX_CM_WKUP_WKUP_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain cpsw_125mhz_43xx_clkdm = {

	.name		  = "cpsw_125mhz_clkdm",

	.pwrdm		  = { .name = "per_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_PER_INST,

	.clkdm_offs	  = AM43XX_CM_PER_CPSW_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain gfx_l3_43xx_clkdm = {

	.name		  = "gfx_l3_clkdm",

	.pwrdm		  = { .name = "gfx_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_GFX_INST,

	.clkdm_offs	  = AM43XX_CM_GFX_GFX_L3_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain l3s_43xx_clkdm = {

	.name		  = "l3s_clkdm",

	.pwrdm		  = { .name = "per_pwrdm" },

	.prcm_partition	  = AM43XX_CM_PARTITION,

	.cm_inst	  = AM43XX_CM_PER_INST,

	.clkdm_offs	  = AM43XX_CM_PER_L3S_CDOFFS,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain *clockdomains_am43xx[] __initdata = {

	&l4_cefuse_43xx_clkdm,

	&mpu_43xx_clkdm,

	&l4ls_43xx_clkdm,

	&tamper_43xx_clkdm,

	&l4_rtc_43xx_clkdm,

	&pruss_ocp_43xx_clkdm,

	&ocpwp_l3_43xx_clkdm,

	&l3s_tsc_43xx_clkdm,

	&dss_43xx_clkdm,

	&l3_aon_43xx_clkdm,

	&emif_43xx_clkdm,

	&l4_wkup_aon_43xx_clkdm,

	&l3_43xx_clkdm,

	&l4_wkup_43xx_clkdm,

	&cpsw_125mhz_43xx_clkdm,

	&gfx_l3_43xx_clkdm,

	&l3s_43xx_clkdm,

	NULL

};



void __init am43xx_clockdomains_init(void)

{

	clkdm_register_platform_funcs(&am43xx_clkdm_operations);

	clkdm_register_clkdms(clockdomains_am43xx);

	clkdm_complete_init();

}

arch/arm/mach-omap2/cm33xx.c

+8 −8
Original line number Diff line number Diff line
@@ -48,13 +48,13 @@ 
/* Private functions */



/* Read a register in a CM instance */

static inline u32 am33xx_cm_read_reg(s16 inst, u16 idx)

static inline u32 am33xx_cm_read_reg(u16 inst, u16 idx)

{

	return __raw_readl(cm_base + inst + idx);

}



/* Write into a register in a CM */

static inline void am33xx_cm_write_reg(u32 val, s16 inst, u16 idx)

static inline void am33xx_cm_write_reg(u32 val, u16 inst, u16 idx)

{

	__raw_writel(val, cm_base + inst + idx);

}
@@ -138,7 +138,7 @@ static bool _is_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs) 
 * @c must be the unshifted value for CLKTRCTRL - i.e., this function

 * will handle the shift itself.

 */

static void _clktrctrl_write(u8 c, s16 inst, u16 cdoffs)

static void _clktrctrl_write(u8 c, u16 inst, u16 cdoffs)

{

	u32 v;
@@ -158,7 +158,7 @@ static void _clktrctrl_write(u8 c, s16 inst, u16 cdoffs) 
 * Returns true if the clockdomain referred to by (@inst, @cdoffs)

 * is in hardware-supervised idle mode, or 0 otherwise.

 */

bool am33xx_cm_is_clkdm_in_hwsup(s16 inst, u16 cdoffs)

bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs)

{

	u32 v;
@@ -177,7 +177,7 @@ bool am33xx_cm_is_clkdm_in_hwsup(s16 inst, u16 cdoffs) 
 * Put a clockdomain referred to by (@inst, @cdoffs) into

 * hardware-supervised idle mode.  No return value.

 */

void am33xx_cm_clkdm_enable_hwsup(s16 inst, u16 cdoffs)

void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs)

{

	_clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, inst, cdoffs);

}
@@ -191,7 +191,7 @@ void am33xx_cm_clkdm_enable_hwsup(s16 inst, u16 cdoffs) 
 * software-supervised idle mode, i.e., controlled manually by the

 * Linux OMAP clockdomain code.  No return value.

 */

void am33xx_cm_clkdm_disable_hwsup(s16 inst, u16 cdoffs)

void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs)

{

	_clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, inst, cdoffs);

}
@@ -204,7 +204,7 @@ void am33xx_cm_clkdm_disable_hwsup(s16 inst, u16 cdoffs) 
 * Put a clockdomain referred to by (@inst, @cdoffs) into idle

 * No return value.

 */

void am33xx_cm_clkdm_force_sleep(s16 inst, u16 cdoffs)

void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs)

{

	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, inst, cdoffs);

}
@@ -217,7 +217,7 @@ void am33xx_cm_clkdm_force_sleep(s16 inst, u16 cdoffs) 
 * Take a clockdomain referred to by (@inst, @cdoffs) out of idle,

 * waking it up.  No return value.

 */

void am33xx_cm_clkdm_force_wakeup(s16 inst, u16 cdoffs)

void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)

{

	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, inst, cdoffs);

}

arch/arm/mach-omap2/cm33xx.h

+6 −6
Original line number Diff line number Diff line
@@ -377,13 +377,13 @@ 




#ifndef __ASSEMBLER__

extern bool am33xx_cm_is_clkdm_in_hwsup(s16 inst, u16 cdoffs);

extern void am33xx_cm_clkdm_enable_hwsup(s16 inst, u16 cdoffs);

extern void am33xx_cm_clkdm_disable_hwsup(s16 inst, u16 cdoffs);

extern void am33xx_cm_clkdm_force_sleep(s16 inst, u16 cdoffs);

extern void am33xx_cm_clkdm_force_wakeup(s16 inst, u16 cdoffs);

bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs);

void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs);

void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);

void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);

void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);



#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)

#ifdef CONFIG_SOC_AM33XX

extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,

					u16 clkctrl_offs);

extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,

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