Commit 8102324d authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'omap-for-v4.16/ti-sysc-signed' of... 

Merge tag 'omap-for-v4.16/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers

TI sysc driver updates for v4.16 merge window

We now have gotten ti-sysc driver to the point where it can parse
interconnect target configuration from device tree instead of the
legacy platform data. This series updates the device tree binding
and adds parsing to the driver for quirks and capabilities.

* tag 'omap-for-v4.16/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

:
  bus: ti-sysc: Add parsing of module capabilities
  bus: ti-sysc: Handle module quirks based dts configuration
  bus: ti-sysc: Detect i2c interconnect target module based on register layout
  bus: ti-sysc: Add register bits for interconnect target modules
  bus: ti-sysc: Make omap_hwmod_sysc_fields into sysc_regbits platform data
  ARM: OMAP2+: Move all omap_hwmod_sysc_fields to omap_hwmod_common_data.c
  ARM: dts: Add generic ti,sysc compatible in addition to the custom ones
  dt-bindings: ti-sysc: Update binding for timers and capabilities

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 710ae35c c5a2de97

Documentation/devicetree/bindings/bus/ti-sysc.txt

+37 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ Required standard properties: 


- compatible	shall be one of the following generic types:



		"ti,sysc"

		"ti,sysc-omap2"

		"ti,sysc-omap4"

		"ti,sysc-omap4-simple"
@@ -26,6 +27,8 @@ Required standard properties: 
		or one of the following derivative types for hardware

		needing special workarounds:



		"ti,sysc-omap2-timer"

		"ti,sysc-omap4-timer"

		"ti,sysc-omap3430-sr"

		"ti,sysc-omap3630-sr"

		"ti,sysc-omap4-sr"
@@ -49,6 +52,26 @@ Required standard properties: 


Optional properties:



- ti,sysc-mask	shall contain mask of supported register bits for the

		SYSCONFIG register as documented in the Technical Reference

		Manual (TRM) for the interconnect target module



- ti,sysc-midle	list of master idle modes supported by the interconnect

		target module as documented in the TRM for SYSCONFIG

		register MIDLEMODE bits



- ti,sysc-sidle	list of slave idle modes supported by the interconnect

		target module as documented in the TRM for SYSCONFIG

		register SIDLEMODE bits



- ti,sysc-delay-us	delay needed after OCP softreset before accssing

			SYSCONFIG register again



- ti,syss-mask	optional mask of reset done status bits as described in the

		TRM for SYSSTATUS registers, typically 1 with some devices

		having separate reset done bits for children like OHCI and

		EHCI



- clocks	clock specifier for each name in the clock-names as

		specified in the binding documentation for ti-clkctrl,

		typically available for all interconnect targets on TI SoCs
@@ -61,6 +84,9 @@ Optional properties: 
- ti,hwmods	optional TI interconnect module name to use legacy

		hwmod platform data



- ti,no-reset-on-init	interconnect target module should not be reset at init



- ti,no-idle-on-init	interconnect target module should not be idled at init



Example: Single instance of MUSB controller on omap4 using interconnect ranges

using offsets from l4_cfg second segment (0x4a000000 + 0x80000 = 0x4a0ab000):
@@ -74,6 +100,17 @@ using offsets from l4_cfg second segment (0x4a000000 + 0x80000 = 0x4a0ab000): 
		reg-names = "rev", "sysc", "syss";

		clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;

		clock-names = "fck";

		ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |

				 SYSC_OMAP2_SOFTRESET |

				 SYSC_OMAP2_AUTOIDLE)>;

		ti,sysc-midle = <SYSC_IDLE_FORCE>,

				<SYSC_IDLE_NO>,

				<SYSC_IDLE_SMART>;

		ti,sysc-sidle = <SYSC_IDLE_FORCE>,

				<SYSC_IDLE_NO>,

				<SYSC_IDLE_SMART>,

				<SYSC_IDLE_SMART_WKUP>;

		ti,syss-mask = <1>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0 0x2b000 0x1000>;

arch/arm/boot/dts/dra7.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -1498,7 +1498,7 @@ 
		};



		target-module@4a0dd000 {

			compatible = "ti,sysc-omap4-sr";

			compatible = "ti,sysc-omap4-sr", "ti,sysc";

			ti,hwmods = "smartreflex_core";

			reg = <0x4a0dd000 0x4>,

			      <0x4a0dd008 0x4>;
@@ -1511,7 +1511,7 @@ 
		};



		target-module@4a0d9000 {

			compatible = "ti,sysc-omap4-sr";

			compatible = "ti,sysc-omap4-sr", "ti,sysc";

			ti,hwmods = "smartreflex_mpu";

			reg = <0x4a0d9000 0x4>,

			      <0x4a0d9008 0x4>;

arch/arm/boot/dts/omap4.dtsi

+10 −10
Original line number Diff line number Diff line
@@ -383,7 +383,7 @@ 
		};



		target-module@48076000 {

			compatible = "ti,sysc-omap4";

			compatible = "ti,sysc-omap4", "ti,sysc";

			ti,hwmods = "slimbus2";

			reg = <0x48076000 0x4>,

			      <0x48076010 0x4>;
@@ -456,7 +456,7 @@ 
		};



		target-module@4a0db000 {

			compatible = "ti,sysc-sr";

			compatible = "ti,sysc-omap4-sr", "ti,sysc";

			ti,hwmods = "smartreflex_iva";

			reg = <0x4a0db000 0x4>,

			      <0x4a0db008 0x4>;
@@ -473,7 +473,7 @@ 
		};



		target-module@4a0dd000 {

			compatible = "ti,sysc-sr";

			compatible = "ti,sysc-omap4-sr", "ti,sysc";

			ti,hwmods = "smartreflex_core";

			reg = <0x4a0dd000 0x4>,

			      <0x4a0dd008 0x4>;
@@ -490,7 +490,7 @@ 
		};



		target-module@4a0d9000 {

			compatible = "ti,sysc-sr";

			compatible = "ti,sysc-omap4-sr", "ti,sysc";

			ti,hwmods = "smartreflex_mpu";

			reg = <0x4a0d9000 0x4>,

			      <0x4a0d9008 0x4>;
@@ -710,7 +710,7 @@ 
		};



		target-module@52000000 {

			compatible = "ti,sysc-omap4";

			compatible = "ti,sysc-omap4", "ti,sysc";

			ti,hwmods = "iss";

			reg = <0x52000000 0x4>,

			      <0x52000010 0x4>;
@@ -817,7 +817,7 @@ 
		};



		target-module@40128000 {

			compatible = "ti,sysc-mcasp";

			compatible = "ti,sysc-mcasp", "ti,sysc";

			ti,hwmods = "mcasp";

			reg = <0x40128004 0x4>;

			reg-names = "sysc";
@@ -835,7 +835,7 @@ 
		};



		target-module@4012c000 {

			compatible = "ti,sysc-omap4";

			compatible = "ti,sysc-omap4", "ti,sysc";

			ti,hwmods = "slimbus1";

			reg = <0x4012c000 0x4>,

			      <0x4012c010 0x4>;
@@ -849,7 +849,7 @@ 
		};



		target-module@401f1000 {

			compatible = "ti,sysc-omap4";

			compatible = "ti,sysc-omap4", "ti,sysc";

			ti,hwmods = "aess";

			reg = <0x401f1000 0x4>,

			      <0x401f1010 0x4>;
@@ -955,7 +955,7 @@ 
		};



		target-module@4a10a000 {

			compatible = "ti,sysc-omap4";

			compatible = "ti,sysc-omap4", "ti,sysc";

			ti,hwmods = "fdif";

			reg = <0x4a10a000 0x4>,

			      <0x4a10a010 0x4>;
@@ -1182,7 +1182,7 @@ 
		};



		target-module@56000000 {

			compatible = "ti,sysc-omap4";

			compatible = "ti,sysc-omap4", "ti,sysc";

			ti,hwmods = "gpu";

			reg = <0x5601fc00 0x4>,

			      <0x5601fc10 0x4>;

arch/arm/mach-omap2/omap_hwmod.c

+2 −0
Original line number Diff line number Diff line
@@ -143,6 +143,8 @@ 
#include <linux/of_address.h>

#include <linux/bootmem.h>



#include <linux/platform_data/ti-sysc.h>



#include <asm/system_misc.h>



#include "clock.h"

arch/arm/mach-omap2/omap_hwmod.h

+10 −24
Original line number Diff line number Diff line
@@ -37,9 +37,15 @@ 


struct omap_device;



extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;

extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;

extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;

extern struct sysc_regbits omap_hwmod_sysc_type1;

extern struct sysc_regbits omap_hwmod_sysc_type2;

extern struct sysc_regbits omap_hwmod_sysc_type3;

extern struct sysc_regbits omap34xx_sr_sysc_fields;

extern struct sysc_regbits omap36xx_sr_sysc_fields;

extern struct sysc_regbits omap3_sham_sysc_fields;

extern struct sysc_regbits omap3xxx_aes_sysc_fields;

extern struct sysc_regbits omap_hwmod_sysc_type_mcasp;

extern struct sysc_regbits omap_hwmod_sysc_type_usb_host_fs;



/*

 * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
@@ -284,26 +290,6 @@ struct omap_hwmod_ocp_if { 
#define CLOCKACT_TEST_ICLK	0x2

#define CLOCKACT_TEST_NONE	0x3



/**

 * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets.

 * @midle_shift: Offset of the midle bit

 * @clkact_shift: Offset of the clockactivity bit

 * @sidle_shift: Offset of the sidle bit

 * @enwkup_shift: Offset of the enawakeup bit

 * @srst_shift: Offset of the softreset bit

 * @autoidle_shift: Offset of the autoidle bit

 * @dmadisable_shift: Offset of the dmadisable bit

 */

struct omap_hwmod_sysc_fields {

	u8 midle_shift;

	u8 clkact_shift;

	u8 sidle_shift;

	u8 enwkup_shift;

	u8 srst_shift;

	u8 autoidle_shift;

	u8 dmadisable_shift;

};



/**

 * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data

 * @rev_offs: IP block revision register offset (from module base addr)
@@ -335,7 +321,7 @@ struct omap_hwmod_class_sysconfig { 
	u32 sysc_offs;

	u32 syss_offs;

	u16 sysc_flags;

	struct omap_hwmod_sysc_fields *sysc_fields;

	struct sysc_regbits *sysc_fields;

	u8 srst_udelay;

	u8 idlemodes;

};

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