Unverified Commit 8101d762 authored by Dan Murphy's avatar Dan Murphy Committed by Mark Brown
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ASoC: tlv320adcx140: Add decimation filter support 



Add decimation filter selection support.
Per Section 8.3.6.7 the Digital Decimation Filter is selectable between
a Linear Phase, Low Latency, and Ultra Low Latency filer.

Signed-off-by: default avatarDan Murphy <dmurphy@ti.com>
Link: https://lore.kernel.org/r/20200221181358.22526-2-dmurphy@ti.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 8a329dbd

sound/soc/codecs/tlv320adcx140.c

+18 −0
Original line number Diff line number Diff line
@@ -169,6 +169,17 @@ static DECLARE_TLV_DB_SCALE(agc_thresh_tlv, -3600, 200, 0); 
/* AGC Max Gain. From 3 dB to 42 dB in 3 dB steps */

static DECLARE_TLV_DB_SCALE(agc_gain_tlv, 300, 300, 0);



static const char * const decimation_filter_text[] = {

	"Linear Phase", "Low Latency", "Ultra-low Latency"

};



static SOC_ENUM_SINGLE_DECL(decimation_filter_enum, ADCX140_DSP_CFG0, 4,

			    decimation_filter_text);



static const struct snd_kcontrol_new decimation_filter_controls[] = {

	SOC_DAPM_ENUM("Decimation Filter", decimation_filter_enum),

};



static const char * const resistor_text[] = {

	"2.5 kOhm", "10 kOhm", "20 kOhm"

};
@@ -404,6 +415,9 @@ static const struct snd_soc_dapm_widget adcx140_dapm_widgets[] = { 
			in3_resistor_controls),

	SND_SOC_DAPM_MUX("IN4 Analog Mic Resistor", SND_SOC_NOPM, 0, 0,

			in4_resistor_controls),



	SND_SOC_DAPM_MUX("Decimation Filter", SND_SOC_NOPM, 0, 0,

			decimation_filter_controls),

};



static const struct snd_soc_dapm_route adcx140_audio_map[] = {
@@ -418,6 +432,10 @@ static const struct snd_soc_dapm_route adcx140_audio_map[] = { 
	{"CH3_ASI_EN", "Switch", "CH3_ADC"},

	{"CH4_ASI_EN", "Switch", "CH4_ADC"},



	{"Decimation Filter", "Linear Phase", "DRE_ENABLE"},

	{"Decimation Filter", "Low Latency", "DRE_ENABLE"},

	{"Decimation Filter", "Ultra-low Latency", "DRE_ENABLE"},



	{"DRE_ENABLE", "Switch", "CH1_DRE_EN"},

	{"DRE_ENABLE", "Switch", "CH2_DRE_EN"},

	{"DRE_ENABLE", "Switch", "CH3_DRE_EN"},

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