drm/i915: Only apply a rmw mmio update if the value changes (80fa64d6) · Commits · 戴 / test

If we try to clear, or even set, a bit in the register that doesn't change the register state; skip the write. There's a slight danger in that the register acts as a latch-on-write, but I do not think we use a rmw cycle with any such latch registers. Suggested-by:

Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by:

Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by:

Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190917080029.27632-1-chris@chris-wilson.co.uk

drivers/gpu/drm/i915/intel_uncore.h

+10 −10

Original line number	Diff line number	Diff line
		@@ -378,22 +378,22 @@ intel_uncore_read64_2x32(struct intel_uncore *uncore,
		static inline void intel_uncore_rmw(struct intel_uncore *uncore,
		i915_reg_t reg, u32 clear, u32 set)
		{
		u32 val;
		u32 old, val;

		val = intel_uncore_read(uncore, reg);
		val &= ~clear;
		val \|= set;
		old = intel_uncore_read(uncore, reg);
		val = (old & ~clear) \| set;
		if (val != old)
		intel_uncore_write(uncore, reg, val);
		}

		static inline void intel_uncore_rmw_fw(struct intel_uncore *uncore,
		i915_reg_t reg, u32 clear, u32 set)
		{
		u32 val;
		u32 old, val;

		val = intel_uncore_read_fw(uncore, reg);
		val &= ~clear;
		val \|= set;
		old = intel_uncore_read_fw(uncore, reg);
		val = (old & ~clear) \| set;
		if (val != old)
		intel_uncore_write_fw(uncore, reg, val);
		}

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