Commit 80e493d2 authored by Luo Jiaxing's avatar Luo Jiaxing Committed by Linus Walleij
Browse files

MAINTAINERS: Add maintainer for HiSilicon GPIO driver 



Here add maintainer information for HiSilicon GPIO driver.

Signed-off-by: default avatarLuo Jiaxing <luojiaxing@huawei.com>
Link: https://lore.kernel.org/r/1607934255-52544-3-git-send-email-luojiaxing@huawei.com


[Dropped some dead code when applying]
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 356b01a9

MAINTAINERS

+7 −0
Original line number Diff line number Diff line
@@ -7908,6 +7908,13 @@ L: dmaengine@vger.kernel.org 
S:	Maintained

F:	drivers/dma/hisi_dma.c













HISILICON GPIO DRIVER













M:	Luo Jiaxing <luojiaxing@huawei.com>













L:	linux-gpio@vger.kernel.org













S:	Maintained













F:	drivers/gpio/gpio-hisi.c













F:	include/linux/platform_data/gpio-hisi.h



























HISILICON HIGH PERFORMANCE RSA ENGINE DRIVER (HPRE)















M:	Zaibo Xu <xuzaibo@huawei.com>















L:	linux-crypto@vger.kernel.org

































drivers/gpio/gpio-hisi.c



+0
−5






























Original line number
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@@ -254,7 +254,6 @@ static void hisi_gpio_get_pdata(struct device *dev,













static int hisi_gpio_probe(struct platform_device *pdev)















{















	struct device *dev = &pdev->dev;













	void __iomem *dat, *set, *clr;















	struct hisi_gpio *hisi_gpio;















	int port_num;















	int ret;









@@ -279,10 +278,6 @@ static int hisi_gpio_probe(struct platform_device *pdev)





























	hisi_gpio->dev = dev;





























	dat = hisi_gpio->reg_base + HISI_GPIO_EXT_PORT_WX;













	set = hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_SET_WX;













	clr = hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_CLR_WX;





























	ret = bgpio_init(&hisi_gpio->chip, hisi_gpio->dev, 0x4,















			 hisi_gpio->reg_base + HISI_GPIO_EXT_PORT_WX,















			 hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_SET_WX,



































































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