Commit 80978a4b authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

clk: renesas: Rework Kconfig and Makefile logic



The goals are to:
  - Allow precise control over and automatic selection of which
    (sub)drivers are used for which SoC (which may change in the
    future),
  - Allow adding support for new SoCs easily,
  - Allow compile-testing of all (sub)drivers,
  - Keep driver selection logic in the subsystem-specific Kconfig,
    independent from the architecture-specific Kconfig (i.e. no "select"
    from arch/arm64/Kconfig.platforms), to avoid dependencies.

This is implemented by:
  - Introducing Kconfig symbols for all drivers and sub-drivers,
  - Introducing the Kconfig symbol CLK_RENESAS, which is enabled
    automatically when building for a Renesas ARM platform, and which
    enables all required drivers without interaction of the user, based
    on SoC-specific ARCH_* symbols,
  - Allowing the user to enable any Kconfig symbol manually if
    COMPILE_TEST is enabled,
  - Using the new Kconfig symbols instead of the ARCH_* symbols to
    control compilation in the Makefile,
  - Always entering drivers/clk/renesas/ during the build.

Note that currently not all (sub)drivers are enabled for
compile-testing, as they depend on independent fixes in other
subsystems.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Acked-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 76394a36
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+1 −1
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ obj-$(CONFIG_COMMON_CLK_NXP) += nxp/
obj-$(CONFIG_MACH_PISTACHIO)		+= pistachio/
obj-$(CONFIG_COMMON_CLK_PXA)		+= pxa/
obj-$(CONFIG_COMMON_CLK_QCOM)		+= qcom/
obj-$(CONFIG_ARCH_RENESAS)		+= renesas/
obj-y					+= renesas/
obj-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip/
obj-$(CONFIG_COMMON_CLK_SAMSUNG)	+= samsung/
obj-$(CONFIG_ARCH_SIRF)			+= sirf/
+110 −15
Original line number Diff line number Diff line
config CLK_RENESAS
	bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS
	default y if ARCH_RENESAS
	select CLK_EMEV2 if ARCH_EMEV2
	select CLK_RZA1 if ARCH_R7S72100
	select CLK_R8A73A4 if ARCH_R8A73A4
	select CLK_R8A7740 if ARCH_R8A7740
	select CLK_R8A7743 if ARCH_R8A7743
	select CLK_R8A7745 if ARCH_R8A7745
	select CLK_R8A7778 if ARCH_R8A7778
	select CLK_R8A7779 if ARCH_R8A7779
	select CLK_R8A7790 if ARCH_R8A7790
	select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
	select CLK_R8A7792 if ARCH_R8A7792
	select CLK_R8A7794 if ARCH_R8A7794
	select CLK_R8A7795 if ARCH_R8A7795
	select CLK_R8A7796 if ARCH_R8A7796
	select CLK_SH73A0 if ARCH_SH73A0

if CLK_RENESAS

# SoC
config CLK_EMEV2
	bool "Emma Mobile EV2 clock support" if COMPILE_TEST

config CLK_RZA1
	bool
	select CLK_RENESAS_CPG_MSTP

config CLK_R8A73A4
	bool
	select CLK_RENESAS_CPG_MSTP
	select CLK_RENESAS_DIV6

config CLK_R8A7740
	bool
	select CLK_RENESAS_CPG_MSTP
	select CLK_RENESAS_DIV6

config CLK_R8A7743
	bool
	select CLK_RCAR_GEN2_CPG

config CLK_R8A7745
	bool
	select CLK_RCAR_GEN2_CPG

config CLK_R8A7778
	bool
	select CLK_RENESAS_CPG_MSTP

config CLK_R8A7779
	bool
	select CLK_RENESAS_CPG_MSTP

config CLK_R8A7790
	bool
	select CLK_RCAR_GEN2
	select CLK_RENESAS_DIV6

config CLK_R8A7791
	bool
	select CLK_RCAR_GEN2
	select CLK_RENESAS_DIV6

config CLK_R8A7792
	bool
	select CLK_RCAR_GEN2

config CLK_R8A7794
	bool
	select CLK_RCAR_GEN2
	select CLK_RENESAS_DIV6

config CLK_R8A7795
	bool
	select CLK_RCAR_GEN3_CPG

config CLK_R8A7796
	bool
	select CLK_RCAR_GEN3_CPG

config CLK_SH73A0
	bool
	select CLK_RENESAS_CPG_MSTP
	select CLK_RENESAS_DIV6


# Family
config CLK_RCAR_GEN2
	bool
	select CLK_RENESAS_CPG_MSTP
	select CLK_RENESAS_DIV6

config CLK_RCAR_GEN2_CPG
	bool
	select CLK_RENESAS_CPG_MSSR

config CLK_RCAR_GEN3_CPG
	bool
	select CLK_RENESAS_CPG_MSSR


# Generic
config CLK_RENESAS_CPG_MSSR
	bool
	default y if ARCH_R8A7743
	default y if ARCH_R8A7745
	default y if ARCH_R8A7795
	default y if ARCH_R8A7796
	select CLK_RENESAS_DIV6

config CLK_RENESAS_CPG_MSTP
	bool
	default y if ARCH_R7S72100
	default y if ARCH_R8A73A4
	default y if ARCH_R8A7740
	default y if ARCH_R8A7778
	default y if ARCH_R8A7779
	default y if ARCH_R8A7790
	default y if ARCH_R8A7791
	default y if ARCH_R8A7792
	default y if ARCH_R8A7793
	default y if ARCH_R8A7794
	default y if ARCH_SH73A0

config CLK_RENESAS_DIV6
	bool "DIV6 clock support" if COMPILE_TEST

endif # CLK_RENESAS
+20 −17
Original line number Diff line number Diff line
obj-$(CONFIG_ARCH_EMEV2)		+= clk-emev2.o
obj-$(CONFIG_ARCH_R7S72100)		+= clk-rz.o
obj-$(CONFIG_ARCH_R8A73A4)		+= clk-r8a73a4.o clk-div6.o
obj-$(CONFIG_ARCH_R8A7740)		+= clk-r8a7740.o clk-div6.o
obj-$(CONFIG_ARCH_R8A7743)		+= r8a7743-cpg-mssr.o rcar-gen2-cpg.o
obj-$(CONFIG_ARCH_R8A7745)		+= r8a7745-cpg-mssr.o rcar-gen2-cpg.o
obj-$(CONFIG_ARCH_R8A7778)		+= clk-r8a7778.o
obj-$(CONFIG_ARCH_R8A7779)		+= clk-r8a7779.o
obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o clk-div6.o
obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o clk-div6.o
obj-$(CONFIG_ARCH_R8A7792)		+= clk-rcar-gen2.o
obj-$(CONFIG_ARCH_R8A7793)		+= clk-rcar-gen2.o clk-div6.o
obj-$(CONFIG_ARCH_R8A7794)		+= clk-rcar-gen2.o clk-div6.o
obj-$(CONFIG_ARCH_R8A7795)		+= r8a7795-cpg-mssr.o rcar-gen3-cpg.o
obj-$(CONFIG_ARCH_R8A7796)		+= r8a7796-cpg-mssr.o rcar-gen3-cpg.o
obj-$(CONFIG_ARCH_SH73A0)		+= clk-sh73a0.o clk-div6.o
# SoC
obj-$(CONFIG_CLK_EMEV2)			+= clk-emev2.o
obj-$(CONFIG_CLK_RZA1)			+= clk-rz.o
obj-$(CONFIG_CLK_R8A73A4)		+= clk-r8a73a4.o
obj-$(CONFIG_CLK_R8A7740)		+= clk-r8a7740.o
obj-$(CONFIG_CLK_R8A7743)		+= r8a7743-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7745)		+= r8a7745-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7778)		+= clk-r8a7778.o
obj-$(CONFIG_CLK_R8A7779)		+= clk-r8a7779.o
obj-$(CONFIG_CLK_R8A7795)		+= r8a7795-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7796)		+= r8a7796-cpg-mssr.o
obj-$(CONFIG_CLK_SH73A0)		+= clk-sh73a0.o

obj-$(CONFIG_CLK_RENESAS_CPG_MSSR)	+= renesas-cpg-mssr.o clk-div6.o
# Family
obj-$(CONFIG_CLK_RCAR_GEN2)		+= clk-rcar-gen2.o
obj-$(CONFIG_CLK_RCAR_GEN2_CPG)		+= rcar-gen2-cpg.o
obj-$(CONFIG_CLK_RCAR_GEN3_CPG)		+= rcar-gen3-cpg.o

# Generic
obj-$(CONFIG_CLK_RENESAS_CPG_MSSR)	+= renesas-cpg-mssr.o
obj-$(CONFIG_CLK_RENESAS_CPG_MSTP)	+= clk-mstp.o
obj-$(CONFIG_CLK_RENESAS_DIV6)		+= clk-div6.o
+4 −4
Original line number Diff line number Diff line
@@ -627,25 +627,25 @@ static inline int cpg_mssr_reset_controller_register(struct cpg_mssr_priv *priv)


static const struct of_device_id cpg_mssr_match[] = {
#ifdef CONFIG_ARCH_R8A7743
#ifdef CONFIG_CLK_R8A7743
	{
		.compatible = "renesas,r8a7743-cpg-mssr",
		.data = &r8a7743_cpg_mssr_info,
	},
#endif
#ifdef CONFIG_ARCH_R8A7745
#ifdef CONFIG_CLK_R8A7745
	{
		.compatible = "renesas,r8a7745-cpg-mssr",
		.data = &r8a7745_cpg_mssr_info,
	},
#endif
#ifdef CONFIG_ARCH_R8A7795
#ifdef CONFIG_CLK_R8A7795
	{
		.compatible = "renesas,r8a7795-cpg-mssr",
		.data = &r8a7795_cpg_mssr_info,
	},
#endif
#ifdef CONFIG_ARCH_R8A7796
#ifdef CONFIG_CLK_R8A7796
	{
		.compatible = "renesas,r8a7796-cpg-mssr",
		.data = &r8a7796_cpg_mssr_info,