Commit 807eeaf9 authored by Simon Horman's avatar Simon Horman
Browse files

ARM: dts: r8a7794: sort subnodes of root node 



Sort the subnodes of the soc node to improve maintainability.
The sort key is the address on the bus with instances of the same
IP block grouped together.

Also re-align comment of audio_clka to match other R-Car SoCs.

This patch should not introduce any functional change.

Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent f217f7bb

arch/arm/boot/dts/r8a7794.dtsi

+45 −45
Original line number Diff line number Diff line
@@ -33,6 +33,35 @@ 
		vin1 = &vin1;

	};



	/*

	 * The external audio clocks are configured as 0 Hz fixed frequency

	 * clocks by default.

	 * Boards that provide audio clocks should override them.

	 */

	audio_clka: audio_clka {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};

	audio_clkb: audio_clkb {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};

	audio_clkc: audio_clkc {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};



	/* External CAN clock */

	can_clk: can {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		/* This value must be overridden by the board. */

		clock-frequency = <0>;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -66,6 +95,22 @@ 
		};

	};



	/* External root clock */

	extal_clk: extal {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		/* This value must be overridden by the board. */

		clock-frequency = <0>;

	};



	/* External SCIF clock */

	scif_clk: scif {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		/* This value must be overridden by the board. */

		clock-frequency = <0>;

	};



	soc {

		compatible = "simple-bus";

		interrupt-parent = <&gic>;
@@ -1353,55 +1398,10 @@ 
				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;

	};



	/* External root clock */

	extal_clk: extal {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		/* This value must be overridden by the board. */

		clock-frequency = <0>;

	};



	/* External USB clock - can be overridden by the board */

	usb_extal_clk: usb_extal {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <48000000>;

	};



	/* External CAN clock */

	can_clk: can {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		/* This value must be overridden by the board. */

		clock-frequency = <0>;

	};



	/* External SCIF clock */

	scif_clk: scif {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		/* This value must be overridden by the board. */

		clock-frequency = <0>;

	};



	/*

	 * The external audio clocks are configured  as 0 Hz fixed

	 * frequency clocks by default.  Boards that provide audio

	 * clocks should override them.

	 */

	audio_clka: audio_clka {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};

	audio_clkb: audio_clkb {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};

	audio_clkc: audio_clkc {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};

};

CRA Git | Maintained and supported by SUSTech CRA and CCSE