Commit 80023aea authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

Merge tag 'irqchip-4.16' of... 

Merge tag 'irqchip-4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull irqchip updates for 4.16 from Marc Zyngier

- Fix a GICv3 issue when parsing ACPI entries for disabled CPUs
- Driver for the MIPS Goldfish virtual platform
- Small fixlet for the ompic driver
- Interrupt polarity support for the Raspberry Pi irqchip
parents 6baf9e67 ebe2f871

Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt

+2 −2
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ Required properties: 
			  registers

- interrupt-controller:	Identifies the node as an interrupt controller

- #interrupt-cells:	Specifies the number of cells needed to encode an

			  interrupt source. The value shall be 1

			  interrupt source. The value shall be 2



Please refer to interrupts.txt in this directory for details of the common

Interrupt Controllers bindings used by client devices.
@@ -32,6 +32,6 @@ local_intc: local_intc { 
	compatible = "brcm,bcm2836-l1-intc";

	reg = <0x40000000 0x100>;

	interrupt-controller;

	#interrupt-cells = <1>;

	#interrupt-cells = <2>;

	interrupt-parent = <&local_intc>;

};

Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt

0 → 100644
+30 −0
Original line number Diff line number Diff line 
Android Goldfish PIC



Android Goldfish programmable interrupt device used by Android

emulator.



Required properties:



- compatible : should contain "google,goldfish-pic"

- reg        : <registers mapping>

- interrupts : <interrupt mapping>



Example for mips when used in cascade mode:



        cpuintc {

                #interrupt-cells = <0x1>;

                #address-cells = <0>;

                interrupt-controller;

                compatible = "mti,cpu-interrupt-controller";

        };



        interrupt-controller@1f000000 {

                compatible = "google,goldfish-pic";

                reg = <0x1f000000 0x1000>;



                interrupt-controller;

                #interrupt-cells = <0x1>;



                interrupt-parent = <&cpuintc>;

                interrupts = <0x2>;

        };

MAINTAINERS

+6 −0
Original line number Diff line number Diff line
@@ -867,6 +867,12 @@ S: Supported 
F:	drivers/android/

F:	drivers/staging/android/



ANDROID GOLDFISH PIC DRIVER

M:	Miodrag Dinic <miodrag.dinic@mips.com>

S:	Supported

F:	Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt

F:	drivers/irqchip/irq-goldfish-pic.c



ANDROID GOLDFISH RTC DRIVER

M:	Miodrag Dinic <miodrag.dinic@mips.com>

S:	Supported

arch/arm/boot/dts/bcm2836.dtsi

+7 −7
Original line number Diff line number Diff line
@@ -13,24 +13,24 @@ 
			compatible = "brcm,bcm2836-l1-intc";

			reg = <0x40000000 0x100>;

			interrupt-controller;

			#interrupt-cells = <1>;

			#interrupt-cells = <2>;

			interrupt-parent = <&local_intc>;

		};



		arm-pmu {

			compatible = "arm,cortex-a7-pmu";

			interrupt-parent = <&local_intc>;

			interrupts = <9>;

			interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;

		};

	};



	timer {

		compatible = "arm,armv7-timer";

		interrupt-parent = <&local_intc>;

		interrupts = <0>, // PHYS_SECURE_PPI

			     <1>, // PHYS_NONSECURE_PPI

			     <3>, // VIRT_PPI

			     <2>; // HYP_PPI

		interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI

			     <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI

			     <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI

			     <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI

		always-on;

	};
@@ -76,7 +76,7 @@ 
	compatible = "brcm,bcm2836-armctrl-ic";

	reg = <0x7e00b200 0x200>;

	interrupt-parent = <&local_intc>;

	interrupts = <8>;

	interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;

};



&cpu_thermal {

arch/arm/boot/dts/bcm2837.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ 
			compatible = "brcm,bcm2836-l1-intc";

			reg = <0x40000000 0x100>;

			interrupt-controller;

			#interrupt-cells = <1>;

			#interrupt-cells = <2>;

			interrupt-parent = <&local_intc>;

		};

	};
@@ -20,10 +20,10 @@ 
	timer {

		compatible = "arm,armv7-timer";

		interrupt-parent = <&local_intc>;

		interrupts = <0>, // PHYS_SECURE_PPI

			     <1>, // PHYS_NONSECURE_PPI

			     <3>, // VIRT_PPI

			     <2>; // HYP_PPI

		interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI

			     <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI

			     <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI

			     <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI

		always-on;

	};
@@ -73,7 +73,7 @@ 
	compatible = "brcm,bcm2836-armctrl-ic";

	reg = <0x7e00b200 0x200>;

	interrupt-parent = <&local_intc>;

	interrupts = <8>;

	interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;

};



&cpu_thermal {

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