ARM: S5PV210: Add usb otg phy control (7f471ee8) · Commits · 戴 / test

arch/arm/mach-s5pv210/Kconfig

+6 −0

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		@@ -65,6 +65,11 @@ config S5PV210_SETUP_SPI
		help
		Common setup code for SPI GPIO configurations.

		config S5PV210_SETUP_USB_PHY
		bool
		help
		Common setup code for USB PHY controller

		menu "S5PC110 Machines"

		config MACH_AQUILA
		@@ -107,6 +112,7 @@ config MACH_GONI
		select S5PV210_SETUP_KEYPAD
		select S5PV210_SETUP_SDHCI
		select S5PV210_SETUP_FIMC
		select S5PV210_SETUP_USB_PHY
		help
		Machine support for Samsung GONI board
		S5PC110(MCP) is one of package option of S5PV210

arch/arm/mach-s5pv210/Makefile

+1 −0

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		@@ -39,3 +39,4 @@ obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o
		obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o
		obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
		obj-$(CONFIG_S5PV210_SETUP_SPI) += setup-spi.o
		obj-$(CONFIG_S5PV210_SETUP_USB_PHY) += setup-usb-phy.o

arch/arm/mach-s5pv210/include/mach/regs-sys.h

+0 −4

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		@@ -13,7 +13,3 @@
		#define S5PV210_USB_PHY_CON (S3C_VA_SYS + 0xE80C)
		#define S5PV210_USB_PHY0_EN (1 << 0)
		#define S5PV210_USB_PHY1_EN (1 << 1)

		/* compatibility defines for s3c-hsotg driver */
		#define S3C64XX_OTHERS S5PV210_USB_PHY_CON
		#define S3C64XX_OTHERS_USBMASK S5PV210_USB_PHY0_EN

arch/arm/mach-s5pv210/setup-usb-phy.c

0 → 100644

+90 −0

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		/*
		* Copyright (C) 2012 Samsung Electronics Co.Ltd
		* Author: Joonyoung Shim <jy0922.shim@samsung.com>
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 as
		* published by the Free Software Foundationr
		*/

		#include <linux/clk.h>
		#include <linux/delay.h>
		#include <linux/err.h>
		#include <linux/io.h>
		#include <linux/platform_device.h>
		#include <mach/map.h>
		#include <mach/regs-sys.h>
		#include <plat/cpu.h>
		#include <plat/regs-usb-hsotg-phy.h>
		#include <plat/usb-phy.h>

		static int s5pv210_usb_otgphy_init(struct platform_device *pdev)
		{
		struct clk *xusbxti;
		u32 phyclk;

		writel(readl(S5PV210_USB_PHY_CON) \| S5PV210_USB_PHY0_EN,
		S5PV210_USB_PHY_CON);

		/* set clock frequency for PLL */
		phyclk = readl(S3C_PHYCLK) & ~S3C_PHYCLK_CLKSEL_MASK;

		xusbxti = clk_get(&pdev->dev, "xusbxti");
		if (xusbxti && !IS_ERR(xusbxti)) {
		switch (clk_get_rate(xusbxti)) {
		case 12 * MHZ:
		phyclk \|= S3C_PHYCLK_CLKSEL_12M;
		break;
		case 24 * MHZ:
		phyclk \|= S3C_PHYCLK_CLKSEL_24M;
		break;
		default:
		case 48 * MHZ:
		/* default reference clock */
		break;
		}
		clk_put(xusbxti);
		}

		/* TODO: select external clock/oscillator */
		writel(phyclk \| S3C_PHYCLK_CLK_FORCE, S3C_PHYCLK);

		/* set to normal OTG PHY */
		writel((readl(S3C_PHYPWR) & ~S3C_PHYPWR_NORMAL_MASK), S3C_PHYPWR);
		mdelay(1);

		/* reset OTG PHY and Link */
		writel(S3C_RSTCON_PHY \| S3C_RSTCON_HCLK \| S3C_RSTCON_PHYCLK,
		S3C_RSTCON);
		udelay(20); /* at-least 10uS */
		writel(0, S3C_RSTCON);

		return 0;
		}

		static int s5pv210_usb_otgphy_exit(struct platform_device *pdev)
		{
		writel((readl(S3C_PHYPWR) \| S3C_PHYPWR_ANALOG_POWERDOWN \|
		S3C_PHYPWR_OTG_DISABLE), S3C_PHYPWR);

		writel(readl(S5PV210_USB_PHY_CON) & ~S5PV210_USB_PHY0_EN,
		S5PV210_USB_PHY_CON);

		return 0;
		}

		int s5p_usb_phy_init(struct platform_device *pdev, int type)
		{
		if (type == S5P_USB_PHY_DEVICE)
		return s5pv210_usb_otgphy_init(pdev);

		return -EINVAL;
		}

		int s5p_usb_phy_exit(struct platform_device *pdev, int type)
		{
		if (type == S5P_USB_PHY_DEVICE)
		return s5pv210_usb_otgphy_exit(pdev);

		return -EINVAL;
		}

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