Commit 7f218978 authored by Georgi Djakov's avatar Georgi Djakov Committed by Stephen Boyd
Browse files

clk: qcom: Fix clk_get_parent function return value 



According to the common clock framework API, the clk_get_parent() function
should return u8. Currently we are returning negative values on error. Fix
this and use the default parent in case of an error.

Signed-off-by: default avatarGeorgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 0b21503d

drivers/clk/qcom/clk-rcg.c

+19 −7
Original line number Original line Diff line number Diff line
@@ -47,15 +47,20 @@ static u8 clk_rcg_get_parent(struct clk_hw *hw) 
	struct clk_rcg *rcg = to_clk_rcg(hw);

	struct clk_rcg *rcg = to_clk_rcg(hw);

	int num_parents = __clk_get_num_parents(hw->clk);

	int num_parents = __clk_get_num_parents(hw->clk);

	u32 ns;

	u32 ns;

	int i;

	int i, ret;





	regmap_read(rcg->clkr.regmap, rcg->ns_reg, &ns);

	ret = regmap_read(rcg->clkr.regmap, rcg->ns_reg, &ns);

	if (ret)

		goto err;

	ns = ns_to_src(&rcg->s, ns);

	ns = ns_to_src(&rcg->s, ns);

	for (i = 0; i < num_parents; i++)

	for (i = 0; i < num_parents; i++)

		if (ns == rcg->s.parent_map[i])

		if (ns == rcg->s.parent_map[i])

			return i;

			return i;





	return -EINVAL;

err:

	pr_debug("%s: Clock %s has invalid parent, using default.\n",

		 __func__, __clk_get_name(hw->clk));

	return 0;

}

}





static int reg_to_bank(struct clk_dyn_rcg *rcg, u32 bank)

static int reg_to_bank(struct clk_dyn_rcg *rcg, u32 bank)
@@ -70,21 +75,28 @@ static u8 clk_dyn_rcg_get_parent(struct clk_hw *hw) 
	int num_parents = __clk_get_num_parents(hw->clk);

	int num_parents = __clk_get_num_parents(hw->clk);

	u32 ns, reg;

	u32 ns, reg;

	int bank;

	int bank;

	int i;

	int i, ret;

	struct src_sel *s;

	struct src_sel *s;





	regmap_read(rcg->clkr.regmap, rcg->bank_reg, &reg);

	ret = regmap_read(rcg->clkr.regmap, rcg->bank_reg, &reg);

	if (ret)

		goto err;

	bank = reg_to_bank(rcg, reg);

	bank = reg_to_bank(rcg, reg);

	s = &rcg->s[bank];

	s = &rcg->s[bank];





	regmap_read(rcg->clkr.regmap, rcg->ns_reg[bank], &ns);

	ret = regmap_read(rcg->clkr.regmap, rcg->ns_reg[bank], &ns);

	if (ret)

		goto err;

	ns = ns_to_src(s, ns);

	ns = ns_to_src(s, ns);





	for (i = 0; i < num_parents; i++)

	for (i = 0; i < num_parents; i++)

		if (ns == s->parent_map[i])

		if (ns == s->parent_map[i])

			return i;

			return i;





	return -EINVAL;

err:

	pr_debug("%s: Clock %s has invalid parent, using default.\n",

		 __func__, __clk_get_name(hw->clk));

	return 0;

}

}





static int clk_rcg_set_parent(struct clk_hw *hw, u8 index)

static int clk_rcg_set_parent(struct clk_hw *hw, u8 index)

drivers/clk/qcom/clk-rcg2.c

+5 −2
Original line number Original line Diff line number Diff line
@@ -69,7 +69,7 @@ static u8 clk_rcg2_get_parent(struct clk_hw *hw) 




	ret = regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg);

	ret = regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg);

	if (ret)

	if (ret)

		return ret;

		goto err;





	cfg &= CFG_SRC_SEL_MASK;

	cfg &= CFG_SRC_SEL_MASK;

	cfg >>= CFG_SRC_SEL_SHIFT;

	cfg >>= CFG_SRC_SEL_SHIFT;
@@ -78,7 +78,10 @@ static u8 clk_rcg2_get_parent(struct clk_hw *hw) 
		if (cfg == rcg->parent_map[i])

		if (cfg == rcg->parent_map[i])

			return i;

			return i;





	return -EINVAL;

err:

	pr_debug("%s: Clock %s has invalid parent, using default.\n",

		 __func__, __clk_get_name(hw->clk));

	return 0;

}

}





static int update_config(struct clk_rcg2 *rcg)

static int update_config(struct clk_rcg2 *rcg)

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