Commit 7e8d5cd9 authored by Daniel Mack's avatar Daniel Mack Committed by Greg Kroah-Hartman
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USB: Add EHCI support for MX27 and MX31 based boards 



The Freescale MX27 and MX31 SoCs have a EHCI controller onboard.
The controller is capable of USB on the go. This patch adds
a driver to support all three of them.

Users have to pass details about serial interface configuration in the
platform data.

The USB OTG core used here is the ARC core, so the driver should
be renamed and probably be merged with ehci-fsl.c eventually.

Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: default avatarDaniel Mack <daniel@caiaq.de>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent ed1db3ad

arch/arm/plat-mxc/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o 
obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o

obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o

obj-$(CONFIG_MXC_PWM)  += pwm.o

obj-$(CONFIG_USB_EHCI_MXC) += ehci.o

obj-$(CONFIG_MXC_ULPI) += ulpi.o

obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o

obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o

arch/arm/plat-mxc/ehci.c

0 → 100644
+92 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms of the GNU General Public License as published by the

 * Free Software Foundation; either version 2 of the License, or (at your

 * option) any later version.

 *

 * This program is distributed in the hope that it will be useful, but

 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY

 * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

 * for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software Foundation,

 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.

 */



#include <linux/platform_device.h>

#include <linux/io.h>



#include <mach/hardware.h>

#include <mach/mxc_ehci.h>



#define USBCTRL_OTGBASE_OFFSET	0x600



#define MX31_OTG_SIC_SHIFT	29

#define MX31_OTG_SIC_MASK	(0xf << MX31_OTG_SIC_SHIFT)

#define MX31_OTG_PM_BIT		(1 << 24)



#define MX31_H2_SIC_SHIFT	21

#define MX31_H2_SIC_MASK	(0xf << MX31_H2_SIC_SHIFT)

#define MX31_H2_PM_BIT		(1 << 16)

#define MX31_H2_DT_BIT		(1 << 5)



#define MX31_H1_SIC_SHIFT	13

#define MX31_H1_SIC_MASK	(0xf << MX31_H1_SIC_SHIFT)

#define MX31_H1_PM_BIT		(1 << 8)

#define MX31_H1_DT_BIT		(1 << 4)



int mxc_set_usbcontrol(int port, unsigned int flags)

{

	unsigned int v;



	if (cpu_is_mx31()) {

		v = readl(IO_ADDRESS(MX31_OTG_BASE_ADDR +

				     USBCTRL_OTGBASE_OFFSET));



		switch (port) {

		case 0:	/* OTG port */

			v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);

			v |= (flags & MXC_EHCI_INTERFACE_MASK)

					<< MX31_OTG_SIC_SHIFT;

			if (flags & MXC_EHCI_POWER_PINS_ENABLED)

				v |= MX31_OTG_PM_BIT;



			break;

		case 1: /* H1 port */

			v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT);

			v |= (flags & MXC_EHCI_INTERFACE_MASK)

						<< MX31_H1_SIC_SHIFT;

			if (flags & MXC_EHCI_POWER_PINS_ENABLED)

				v |= MX31_H1_PM_BIT;



			if (!(flags & MXC_EHCI_TTL_ENABLED))

				v |= MX31_H1_DT_BIT;



			break;

		case 2:	/* H2 port */

			v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT);

			v |= (flags & MXC_EHCI_INTERFACE_MASK)

						<< MX31_H2_SIC_SHIFT;

			if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))

				v |= MX31_H2_PM_BIT;



			if (!(flags & MXC_EHCI_TTL_ENABLED))

				v |= MX31_H2_DT_BIT;



			break;

		}



		writel(v, IO_ADDRESS(MX31_OTG_BASE_ADDR +

				     USBCTRL_OTGBASE_OFFSET));

		return 0;

	}



	printk(KERN_WARNING

		"%s() unable to setup USBCONTROL for this CPU\n", __func__);

	return -EINVAL;

}

EXPORT_SYMBOL(mxc_set_usbcontrol);

arch/arm/plat-mxc/include/mach/mxc_ehci.h

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+37 −0
Original line number Diff line number Diff line 
#ifndef __INCLUDE_ASM_ARCH_MXC_EHCI_H

#define __INCLUDE_ASM_ARCH_MXC_EHCI_H



/* values for portsc field */

#define MXC_EHCI_PHY_LOW_POWER_SUSPEND	(1 << 23)

#define MXC_EHCI_FORCE_FS		(1 << 24)

#define MXC_EHCI_UTMI_8BIT		(0 << 28)

#define MXC_EHCI_UTMI_16BIT		(1 << 28)

#define MXC_EHCI_SERIAL			(1 << 29)

#define MXC_EHCI_MODE_UTMI		(0 << 30)

#define MXC_EHCI_MODE_PHILIPS		(1 << 30)

#define MXC_EHCI_MODE_ULPI		(2 << 30)

#define MXC_EHCI_MODE_SERIAL		(3 << 30)



/* values for flags field */

#define MXC_EHCI_INTERFACE_DIFF_UNI	(0 << 0)

#define MXC_EHCI_INTERFACE_DIFF_BI	(1 << 0)

#define MXC_EHCI_INTERFACE_SINGLE_UNI	(2 << 0)

#define MXC_EHCI_INTERFACE_SINGLE_BI	(3 << 0)

#define MXC_EHCI_INTERFACE_MASK		(0xf)



#define MXC_EHCI_POWER_PINS_ENABLED	(1 << 5)

#define MXC_EHCI_TTL_ENABLED		(1 << 6)



struct mxc_usbh_platform_data {

	int (*init)(struct platform_device *pdev);

	int (*exit)(struct platform_device *pdev);



	unsigned int		 portsc;

	unsigned int		 flags;

	struct otg_transceiver	*otg;

};



int mxc_set_usbcontrol(int port, unsigned int flags);



#endif /* __INCLUDE_ASM_ARCH_MXC_EHCI_H */

drivers/usb/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -60,6 +60,7 @@ config USB_ARCH_HAS_EHCI 
	default y if ARCH_IXP4XX

	default y if ARCH_W90X900

	default y if ARCH_AT91SAM9G45

	default y if ARCH_MXC

	default PCI



# ARM SA1111 chips have a non-PCI based "OHCI-compatible" USB host interface.

drivers/usb/host/Kconfig

+7 −0
Original line number Diff line number Diff line
@@ -116,6 +116,13 @@ config USB_EHCI_FSL 
	---help---

	  Variation of ARC USB block used in some Freescale chips.



config USB_EHCI_MXC

	bool "Support for Freescale on-chip EHCI USB controller"

	depends on USB_EHCI_HCD && ARCH_MXC

	select USB_EHCI_ROOT_HUB_TT

	---help---

	  Variation of ARC USB block used in some Freescale chips.



config USB_EHCI_HCD_PPC_OF

	bool "EHCI support for PPC USB controller on OF platform bus"

	depends on USB_EHCI_HCD && PPC_OF

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