ARM: dts: Add DT for Hitex LPC4350 Evaluation Board (7dfc6358) · Commits · 戴 / test

Documentation/devicetree/bindings/vendor-prefixes.txt

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		@@ -95,6 +95,7 @@ haoyu Haoyu Microelectronic Co. Ltd.
		himax Himax Technologies, Inc.
		hisilicon Hisilicon Limited.
		hit Hitachi Ltd.
		hitex Hitex Development Tools
		honeywell Honeywell
		hp Hewlett Packard
		i2se I2SE GmbH

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		/*
		* Hitex LPC4350 Evaluation Board
		*
		* Copyright 2015 Ariel D'Alessandro <ariel.dalessandro@gmail.com>
		*
		* This code is released using a dual license strategy: BSD/GPL
		* You can choose the licence that better fits your requirements.
		*
		* Released under the terms of 3-clause BSD License
		* Released under the terms of GNU General Public License Version 2.0
		*
		*/
		/dts-v1/;

		#include "lpc18xx.dtsi"
		#include "lpc4350.dtsi"

		/ {
		model = "Hitex LPC4350 Evaluation Board";
		compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";

		aliases {
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		};

		chosen {
		stdout-path = &uart0;
		};

		memory {
		device_type = "memory";
		reg = <0x28000000 0x800000>; /* 8 MB */
		};
		};

		&pll1 {
		clock-mult = <15>;
		};

		&uart0 {
		status = "okay";
		};

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		/*
		* NXP LPC4350 and LPC4330 SoC
		*
		* Copyright 2015 Ariel D'Alessandro <ariel.dalessandro@gmail.com>
		*
		* This code is released using a dual license strategy: BSD/GPL
		* You can choose the licence that better fits your requirements.
		*
		* Released under the terms of 3-clause BSD License
		* Released under the terms of GNU General Public License Version 2.0
		*
		*/

		/ {
		compatible = "nxp,lpc4350", "nxp,lpc4330";

		cpus {
		cpu@0 {
		compatible = "arm,cortex-m4";
		};
		};

		soc {
		sram0: sram@10000000 {
		compatible = "mmio-sram";
		reg = <0x10000000 0x20000>; /* 96 + 32 KiB local SRAM */
		};

		sram1: sram@10080000 {
		compatible = "mmio-sram";
		reg = <0x10080000 0x12000>; /* 64 + 8 KiB local SRAM */
		};

		sram2: sram@20000000 {
		compatible = "mmio-sram";
		reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
		};
		};
		};