Commit 7dacb64f authored by Wayne Boyer's avatar Wayne Boyer Committed by James Bottomley
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[SCSI] ipr: improve interrupt service routine performance 



During performance testing on P7 machines it was observed that the interrupt
service routine was doing unnecessary MMIO operations.

This patch rearranges the logic of the routine and moves some of the code out
of the main routine.  The result is that there are now fewer MMIO operations in
the performance path of the code.

As a result of the above change, an existing condition was exposed where the
driver could get an "unexpected" hrrq interrupt.  The original code would flag
the interrupt as unexpected and then reset the adapter.  After further analysis
it was confirmed that this condition can occasionally occur and that the
interrupt can safely be ignored.  Additional code in this patch detects this
condition, clears the interrupt and allows the driver to continue without
resetting the adapter.

Signed-off-by: default avatarWayne Boyer <wayneb@linux.vnet.ibm.com>
Acked-by: default avatarBrian King <brking@linux.vnet.ibm.com>
Signed-off-by: default avatarJames Bottomley <James.Bottomley@suse.de>
parent 3425fbfe

drivers/scsi/ipr.c

+39 −29
Original line number Diff line number Diff line
@@ -4956,6 +4956,32 @@ static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg, 
					      u32 int_reg)

{

	irqreturn_t rc = IRQ_HANDLED;

	u32 int_mask_reg;



	int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);

	int_reg &= ~int_mask_reg;



	/* If an interrupt on the adapter did not occur, ignore it.

	 * Or in the case of SIS 64, check for a stage change interrupt.

	 */

	if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) {

		if (ioa_cfg->sis64) {

			int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);

			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;

			if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {



				/* clear stage change */

				writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.clr_interrupt_reg);

				int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;

				list_del(&ioa_cfg->reset_cmd->queue);

				del_timer(&ioa_cfg->reset_cmd->timer);

				ipr_reset_ioa_job(ioa_cfg->reset_cmd);

				return IRQ_HANDLED;

			}

		}



		return IRQ_NONE;

	}



	if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {

		/* Mask the interrupt */
@@ -4968,6 +4994,13 @@ static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg, 
		list_del(&ioa_cfg->reset_cmd->queue);

		del_timer(&ioa_cfg->reset_cmd->timer);

		ipr_reset_ioa_job(ioa_cfg->reset_cmd);

	} else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) {

		if (ipr_debug && printk_ratelimit())

			dev_err(&ioa_cfg->pdev->dev,

				"Spurious interrupt detected. 0x%08X\n", int_reg);

		writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);

		int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);

		return IRQ_NONE;

	} else {

		if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)

			ioa_cfg->ioa_unit_checked = 1;
@@ -5016,10 +5049,11 @@ static irqreturn_t ipr_isr(int irq, void *devp) 
{

	struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)devp;

	unsigned long lock_flags = 0;

	u32 int_reg, int_mask_reg;

	u32 int_reg = 0;

	u32 ioasc;

	u16 cmd_index;

	int num_hrrq = 0;

	int irq_none = 0;

	struct ipr_cmnd *ipr_cmd;

	irqreturn_t rc = IRQ_NONE;
@@ -5031,33 +5065,6 @@ static irqreturn_t ipr_isr(int irq, void *devp) 
		return IRQ_NONE;

	}



	int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);

	int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32) & ~int_mask_reg;



	/* If an interrupt on the adapter did not occur, ignore it.

	 * Or in the case of SIS 64, check for a stage change interrupt.

	 */

	if (unlikely((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0)) {

		if (ioa_cfg->sis64) {

			int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);

			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;

			if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {



				/* clear stage change */

				writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.clr_interrupt_reg);

				int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;

				list_del(&ioa_cfg->reset_cmd->queue);

				del_timer(&ioa_cfg->reset_cmd->timer);

				ipr_reset_ioa_job(ioa_cfg->reset_cmd);

				spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);

				return IRQ_HANDLED;

			}

		}



		spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);

		return IRQ_NONE;

	}



	while (1) {

		ipr_cmd = NULL;
@@ -5097,7 +5104,7 @@ static irqreturn_t ipr_isr(int irq, void *devp) 
			/* Clear the PCI interrupt */

			do {

				writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);

				int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32) & ~int_mask_reg;

				int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);

			} while (int_reg & IPR_PCII_HRRQ_UPDATED &&

					num_hrrq++ < IPR_MAX_HRRQ_RETRIES);
@@ -5107,6 +5114,9 @@ static irqreturn_t ipr_isr(int irq, void *devp) 
				return IRQ_HANDLED;

			}



		} else if (rc == IRQ_NONE && irq_none == 0) {

			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);

			irq_none++;

		} else

			break;

	}

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