Commit 7da45139 authored by Miquel Raynal's avatar Miquel Raynal
Browse files

mtd: rawnand: better name for the controller structure



In the raw NAND core, a NAND chip is described by a nand_chip structure,
while a NAND controller is described with a nand_hw_control structure
which is not very meaningful.

Rename this structure nand_controller.

As the structure gets renamed, it is logical to also rename the core
function initializing it from nand_hw_control_init() to
nand_controller_init().

Lastly, the 'hwcontrol' entry of the nand_chip structure is not
meaningful neither while it has the role of fallback when no controller
structure is provided by the driver (the controller driver is dumb and
can only control a single chip). Thus, it is renamed dummy_controller.

Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Acked-by: default avatarBoris Brezillon <boris.brezillon@bootlin.com>
parent 110ab158
Loading
Loading
Loading
Loading
+5 −5
Original line number Diff line number Diff line
@@ -216,7 +216,7 @@ struct atmel_nand_controller_caps {
};

struct atmel_nand_controller {
	struct nand_hw_control base;
	struct nand_controller base;
	const struct atmel_nand_controller_caps *caps;
	struct device *dev;
	struct regmap *smc;
@@ -227,7 +227,7 @@ struct atmel_nand_controller {
};

static inline struct atmel_nand_controller *
to_nand_controller(struct nand_hw_control *ctl)
to_nand_controller(struct nand_controller *ctl)
{
	return container_of(ctl, struct atmel_nand_controller, base);
}
@@ -239,7 +239,7 @@ struct atmel_smc_nand_controller {
};

static inline struct atmel_smc_nand_controller *
to_smc_nand_controller(struct nand_hw_control *ctl)
to_smc_nand_controller(struct nand_controller *ctl)
{
	return container_of(to_nand_controller(ctl),
			    struct atmel_smc_nand_controller, base);
@@ -263,7 +263,7 @@ struct atmel_hsmc_nand_controller {
};

static inline struct atmel_hsmc_nand_controller *
to_hsmc_nand_controller(struct nand_hw_control *ctl)
to_hsmc_nand_controller(struct nand_controller *ctl)
{
	return container_of(to_nand_controller(ctl),
			    struct atmel_hsmc_nand_controller, base);
@@ -1966,7 +1966,7 @@ static int atmel_nand_controller_init(struct atmel_nand_controller *nc,
	struct device_node *np = dev->of_node;
	int ret;

	nand_hw_control_init(&nc->base);
	nand_controller_init(&nc->base);
	INIT_LIST_HEAD(&nc->chips);
	nc->dev = dev;
	nc->caps = caps;
+2 −2
Original line number Diff line number Diff line
@@ -114,7 +114,7 @@ enum {

struct brcmnand_controller {
	struct device		*dev;
	struct nand_hw_control	controller;
	struct nand_controller	controller;
	void __iomem		*nand_base;
	void __iomem		*nand_fc; /* flash cache */
	void __iomem		*flash_dma_base;
@@ -2433,7 +2433,7 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)

	init_completion(&ctrl->done);
	init_completion(&ctrl->dma_done);
	nand_hw_control_init(&ctrl->controller);
	nand_controller_init(&ctrl->controller);
	INIT_LIST_HEAD(&ctrl->host_list);

	/* NAND register range */
+2 −2
Original line number Diff line number Diff line
@@ -1257,8 +1257,8 @@ static void __init init_mtd_structs(struct mtd_info *mtd)
	nand->ecc.strength = DOCG4_T;
	nand->options = NAND_BUSWIDTH_16 | NAND_NO_SUBPAGE_WRITE;
	nand->IO_ADDR_R = nand->IO_ADDR_W = doc->virtadr + DOC_IOSPACE_DATA;
	nand->controller = &nand->hwcontrol;
	nand_hw_control_init(nand->controller);
	nand->controller = &nand->dummy_controller;
	nand_controller_init(nand->controller);

	/* methods */
	nand->cmdfunc = docg4_command;
+2 −2
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ struct fsl_elbc_mtd {
/* Freescale eLBC FCM controller information */

struct fsl_elbc_fcm_ctrl {
	struct nand_hw_control controller;
	struct nand_controller controller;
	struct fsl_elbc_mtd *chips[MAX_BANKS];

	u8 __iomem *addr;        /* Address of assigned FCM buffer        */
@@ -879,7 +879,7 @@ static int fsl_elbc_nand_probe(struct platform_device *pdev)
		}
		elbc_fcm_ctrl->counter++;

		nand_hw_control_init(&elbc_fcm_ctrl->controller);
		nand_controller_init(&elbc_fcm_ctrl->controller);
		fsl_lbc_ctrl_dev->nand = elbc_fcm_ctrl;
	} else {
		elbc_fcm_ctrl = fsl_lbc_ctrl_dev->nand;
+2 −2
Original line number Diff line number Diff line
@@ -51,7 +51,7 @@ struct fsl_ifc_mtd {

/* overview of the fsl ifc controller */
struct fsl_ifc_nand_ctrl {
	struct nand_hw_control controller;
	struct nand_controller controller;
	struct fsl_ifc_mtd *chips[FSL_IFC_BANK_COUNT];

	void __iomem *addr;	/* Address of assigned IFC buffer	*/
@@ -1004,7 +1004,7 @@ static int fsl_ifc_nand_probe(struct platform_device *dev)
		ifc_nand_ctrl->addr = NULL;
		fsl_ifc_ctrl_dev->nand = ifc_nand_ctrl;

		nand_hw_control_init(&ifc_nand_ctrl->controller);
		nand_controller_init(&ifc_nand_ctrl->controller);
	} else {
		ifc_nand_ctrl = fsl_ifc_ctrl_dev->nand;
	}
Loading