ASoC: rt700: add rt700 codec driver (7d2a5f9a) · Commits · 戴 / test

sound/soc/codecs/Kconfig

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Original line number	Diff line number	Diff line
		@@ -165,6 +165,7 @@ config SND_SOC_ALL_CODECS
		select SND_SOC_RT5670 if I2C
		select SND_SOC_RT5677 if I2C && SPI_MASTER
		select SND_SOC_RT5682 if I2C
		select SND_SOC_RT700_SDW if SOUNDWIRE
		select SND_SOC_RT711_SDW if SOUNDWIRE
		select SND_SOC_SGTL5000 if I2C
		select SND_SOC_SI476X if MFD_SI476X_CORE
		@@ -1060,6 +1061,15 @@ config SND_SOC_RT5677_SPI
		config SND_SOC_RT5682
		tristate

		config SND_SOC_RT700
		tristate

		config SND_SOC_RT700_SDW
		tristate "Realtek RT700 Codec - SDW"
		depends on SOUNDWIRE
		select SND_SOC_RT700
		select REGMAP_SOUNDWIRE

		config SND_SOC_RT711
		tristate

sound/soc/codecs/Makefile

+2 −0

Original line number	Diff line number	Diff line
		@@ -173,6 +173,7 @@ snd-soc-rt5670-objs := rt5670.o
		snd-soc-rt5677-objs := rt5677.o
		snd-soc-rt5677-spi-objs := rt5677-spi.o
		snd-soc-rt5682-objs := rt5682.o
		snd-soc-rt700-objs := rt700.o rt700-sdw.o
		snd-soc-rt711-objs := rt711.o rt711-sdw.o
		snd-soc-sgtl5000-objs := sgtl5000.o
		snd-soc-alc5623-objs := alc5623.o
		@@ -466,6 +467,7 @@ obj-$(CONFIG_SND_SOC_RT5670) += snd-soc-rt5670.o
		obj-$(CONFIG_SND_SOC_RT5677) += snd-soc-rt5677.o
		obj-$(CONFIG_SND_SOC_RT5677_SPI) += snd-soc-rt5677-spi.o
		obj-$(CONFIG_SND_SOC_RT5682) += snd-soc-rt5682.o
		obj-$(CONFIG_SND_SOC_RT700) += snd-soc-rt700.o
		obj-$(CONFIG_SND_SOC_RT711) += snd-soc-rt711.o
		obj-$(CONFIG_SND_SOC_SGTL5000) += snd-soc-sgtl5000.o
		obj-$(CONFIG_SND_SOC_SIGMADSP) += snd-soc-sigmadsp.o

sound/soc/codecs/rt700-sdw.c

0 → 100644

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Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0
		//
		// rt700-sdw.c -- rt700 ALSA SoC audio driver
		//
		// Copyright(c) 2019 Realtek Semiconductor Corp.
		//
		//

		#include <linux/delay.h>
		#include <linux/device.h>
		#include <linux/mod_devicetable.h>
		#include <linux/soundwire/sdw.h>
		#include <linux/soundwire/sdw_type.h>
		#include <linux/module.h>
		#include <linux/regmap.h>
		#include <sound/soc.h>
		#include "rt700.h"
		#include "rt700-sdw.h"

		static bool rt700_readable_register(struct device *dev, unsigned int reg)
		{
		switch (reg) {
		case 0x00e0:
		case 0x00f0:
		case 0x2000 ... 0x200e:
		case 0x2012 ... 0x2016:
		case 0x201a ... 0x2027:
		case 0x2029 ... 0x202a:
		case 0x202d ... 0x2034:
		case 0x2200 ... 0x2204:
		case 0x2206 ... 0x2212:
		case 0x2220 ... 0x2223:
		case 0x2230 ... 0x2231:
		case 0x3000 ... 0x3fff:
		case 0x7000 ... 0x7fff:
		case 0x8300 ... 0x83ff:
		case 0x9c00 ... 0x9cff:
		case 0xb900 ... 0xb9ff:
		case 0x75201a:
		case 0x752045:
		case 0x752046:
		case 0x752048:
		case 0x75204a:
		case 0x75206b:
		case 0x752080:
		case 0x752081:
		return true;
		default:
		return false;
		}
		}

		static bool rt700_volatile_register(struct device *dev, unsigned int reg)
		{
		switch (reg) {
		case 0x2009:
		case 0x2016:
		case 0x201b:
		case 0x201c:
		case 0x201d:
		case 0x201f:
		case 0x2021:
		case 0x2023:
		case 0x2230:
		case 0x200b ... 0x200e: /* i2c read */
		case 0x2012 ... 0x2015: /* HD-A read */
		case 0x202d ... 0x202f: /* BRA */
		case 0x2201 ... 0x2212: /* i2c debug */
		case 0x2220 ... 0x2223: /* decoded HD-A */
		case 0x9c00 ... 0x9cff:
		case 0xb900 ... 0xb9ff:
		case 0xff01:
		case 0x75201a:
		case 0x752046:
		case 0x752080:
		case 0x752081:
		return true;
		default:
		return false;
		}
		}

		static int rt700_sdw_read(void context, unsigned int reg, unsigned int val)
		{
		struct device *dev = context;
		struct rt700_priv *rt700 = dev_get_drvdata(dev);
		unsigned int sdw_data_3, sdw_data_2, sdw_data_1, sdw_data_0;
		unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2;
		unsigned int is_hda_reg = 1, is_index_reg = 0;
		int ret;

		if (reg > 0xffff)
		is_index_reg = 1;

		mask = reg & 0xf000;

		if (is_index_reg) { /* index registers */
		val2 = reg & 0xff;
		reg = reg >> 8;
		nid = reg & 0xff;
		ret = regmap_write(rt700->sdw_regmap, reg, 0);
		if (ret < 0)
		return ret;
		reg2 = reg + 0x1000;
		reg2 \|= 0x80;
		ret = regmap_write(rt700->sdw_regmap, reg2, val2);
		if (ret < 0)
		return ret;

		reg3 = RT700_PRIV_DATA_R_H \| nid;
		ret = regmap_write(rt700->sdw_regmap,
		reg3, ((*val >> 8) & 0xff));
		if (ret < 0)
		return ret;
		reg4 = reg3 + 0x1000;
		reg4 \|= 0x80;
		ret = regmap_write(rt700->sdw_regmap, reg4, (*val & 0xff));
		if (ret < 0)
		return ret;
		} else if (mask == 0x3000) {
		reg += 0x8000;
		ret = regmap_write(rt700->sdw_regmap, reg, *val);
		if (ret < 0)
		return ret;
		} else if (mask == 0x7000) {
		reg += 0x2000;
		reg \|= 0x800;
		ret = regmap_write(rt700->sdw_regmap,
		reg, ((*val >> 8) & 0xff));
		if (ret < 0)
		return ret;
		reg2 = reg + 0x1000;
		reg2 \|= 0x80;
		ret = regmap_write(rt700->sdw_regmap, reg2, (*val & 0xff));
		if (ret < 0)
		return ret;
		} else if ((reg & 0xff00) == 0x8300) { /* for R channel */
		reg2 = reg - 0x1000;
		reg2 &= ~0x80;
		ret = regmap_write(rt700->sdw_regmap,
		reg2, ((*val >> 8) & 0xff));
		if (ret < 0)
		return ret;
		ret = regmap_write(rt700->sdw_regmap, reg, (*val & 0xff));
		if (ret < 0)
		return ret;
		} else if (mask == 0x9000) {
		ret = regmap_write(rt700->sdw_regmap,
		reg, ((*val >> 8) & 0xff));
		if (ret < 0)
		return ret;
		reg2 = reg + 0x1000;
		reg2 \|= 0x80;
		ret = regmap_write(rt700->sdw_regmap, reg2, (*val & 0xff));
		if (ret < 0)
		return ret;
		} else if (mask == 0xb000) {
		ret = regmap_write(rt700->sdw_regmap, reg, *val);
		if (ret < 0)
		return ret;
		} else {
		ret = regmap_read(rt700->sdw_regmap, reg, val);
		if (ret < 0)
		return ret;
		is_hda_reg = 0;
		}

		if (is_hda_reg \|\| is_index_reg) {
		sdw_data_3 = 0;
		sdw_data_2 = 0;
		sdw_data_1 = 0;
		sdw_data_0 = 0;
		ret = regmap_read(rt700->sdw_regmap,
		RT700_READ_HDA_3, &sdw_data_3);
		if (ret < 0)
		return ret;
		ret = regmap_read(rt700->sdw_regmap,
		RT700_READ_HDA_2, &sdw_data_2);
		if (ret < 0)
		return ret;
		ret = regmap_read(rt700->sdw_regmap,
		RT700_READ_HDA_1, &sdw_data_1);
		if (ret < 0)
		return ret;
		ret = regmap_read(rt700->sdw_regmap,
		RT700_READ_HDA_0, &sdw_data_0);
		if (ret < 0)
		return ret;
		*val = ((sdw_data_3 & 0xff) << 24) \|
		((sdw_data_2 & 0xff) << 16) \|
		((sdw_data_1 & 0xff) << 8) \| (sdw_data_0 & 0xff);
		}

		if (is_hda_reg == 0)
		dev_dbg(dev, "[%s] %04x => %08x\n", __func__, reg, *val);
		else if (is_index_reg)
		dev_dbg(dev, "[%s] %04x %04x %04x %04x => %08x\n",
		__func__, reg, reg2, reg3, reg4, *val);
		else
		dev_dbg(dev, "[%s] %04x %04x => %08x\n",
		__func__, reg, reg2, *val);

		return 0;
		}

		static int rt700_sdw_write(void *context, unsigned int reg, unsigned int val)
		{
		struct device *dev = context;
		struct rt700_priv *rt700 = dev_get_drvdata(dev);
		unsigned int reg2 = 0, reg3, reg4, nid, mask, val2;
		unsigned int is_index_reg = 0;
		int ret;

		if (reg > 0xffff)
		is_index_reg = 1;

		mask = reg & 0xf000;

		if (is_index_reg) { /* index registers */
		val2 = reg & 0xff;
		reg = reg >> 8;
		nid = reg & 0xff;
		ret = regmap_write(rt700->sdw_regmap, reg, 0);
		if (ret < 0)
		return ret;
		reg2 = reg + 0x1000;
		reg2 \|= 0x80;
		ret = regmap_write(rt700->sdw_regmap, reg2, val2);
		if (ret < 0)
		return ret;

		reg3 = RT700_PRIV_DATA_W_H \| nid;
		ret = regmap_write(rt700->sdw_regmap,
		reg3, ((val >> 8) & 0xff));
		if (ret < 0)
		return ret;
		reg4 = reg3 + 0x1000;
		reg4 \|= 0x80;
		ret = regmap_write(rt700->sdw_regmap, reg4, (val & 0xff));
		if (ret < 0)
		return ret;
		is_index_reg = 1;
		} else if (reg < 0x4fff) {
		ret = regmap_write(rt700->sdw_regmap, reg, val);
		if (ret < 0)
		return ret;
		} else if (reg == 0xff01) {
		ret = regmap_write(rt700->sdw_regmap, reg, val);
		if (ret < 0)
		return ret;
		} else if (mask == 0x7000) {
		ret = regmap_write(rt700->sdw_regmap,
		reg, ((val >> 8) & 0xff));
		if (ret < 0)
		return ret;
		reg2 = reg + 0x1000;
		reg2 \|= 0x80;
		ret = regmap_write(rt700->sdw_regmap, reg2, (val & 0xff));
		if (ret < 0)
		return ret;
		} else if ((reg & 0xff00) == 0x8300) { /* for R channel */
		reg2 = reg - 0x1000;
		reg2 &= ~0x80;
		ret = regmap_write(rt700->sdw_regmap,
		reg2, ((val >> 8) & 0xff));
		if (ret < 0)
		return ret;
		ret = regmap_write(rt700->sdw_regmap, reg, (val & 0xff));
		if (ret < 0)
		return ret;
		}

		if (reg2 == 0)
		dev_dbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
		else if (is_index_reg)
		dev_dbg(dev, "[%s] %04x %04x %04x %04x <= %04x %04x\n",
		__func__, reg, reg2, reg3, reg4, val2, val);
		else
		dev_dbg(dev, "[%s] %04x %04x <= %04x\n",
		__func__, reg, reg2, val);

		return 0;
		}

		static const struct regmap_config rt700_regmap = {
		.reg_bits = 24,
		.val_bits = 32,
		.readable_reg = rt700_readable_register,
		.volatile_reg = rt700_volatile_register,
		.max_register = 0x755800,
		.reg_defaults = rt700_reg_defaults,
		.num_reg_defaults = ARRAY_SIZE(rt700_reg_defaults),
		.cache_type = REGCACHE_RBTREE,
		.use_single_read = true,
		.use_single_write = true,
		.reg_read = rt700_sdw_read,
		.reg_write = rt700_sdw_write,
		};

		static const struct regmap_config rt700_sdw_regmap = {
		.name = "sdw",
		.reg_bits = 32,
		.val_bits = 8,
		.readable_reg = rt700_readable_register,
		.max_register = 0xff01,
		.cache_type = REGCACHE_NONE,
		.use_single_read = true,
		.use_single_write = true,
		};

		static int rt700_update_status(struct sdw_slave *slave,
		enum sdw_slave_status status)
		{
		struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);

		/* Update the status */
		rt700->status = status;

		if (status == SDW_SLAVE_UNATTACHED)
		rt700->hw_init = false;

		/*
		* Perform initialization only if slave status is present and
		* hw_init flag is false
		*/
		if (rt700->hw_init \|\| rt700->status != SDW_SLAVE_ATTACHED)
		return 0;

		/* perform I/O transfers required for Slave initialization */
		return rt700_io_init(&slave->dev, slave);
		}

		static int rt700_read_prop(struct sdw_slave *slave)
		{
		struct sdw_slave_prop *prop = &slave->prop;
		int nval, i, num_of_ports = 1;
		u32 bit;
		unsigned long addr;
		struct sdw_dpn_prop *dpn;

		prop->paging_support = false;

		/* first we need to allocate memory for set bits in port lists */
		prop->source_ports = 0x14; /* BITMAP: 00010100 */
		prop->sink_ports = 0xA; /* BITMAP: 00001010 */

		nval = hweight32(prop->source_ports);
		num_of_ports += nval;
		prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
		sizeof(*prop->src_dpn_prop),
		GFP_KERNEL);
		if (!prop->src_dpn_prop)
		return -ENOMEM;

		i = 0;
		dpn = prop->src_dpn_prop;
		addr = prop->source_ports;
		for_each_set_bit(bit, &addr, 32) {
		dpn[i].num = bit;
		dpn[i].type = SDW_DPN_FULL;
		dpn[i].simple_ch_prep_sm = true;
		dpn[i].ch_prep_timeout = 10;
		i++;
		}

		/* do this again for sink now */
		nval = hweight32(prop->sink_ports);
		num_of_ports += nval;
		prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
		sizeof(*prop->sink_dpn_prop),
		GFP_KERNEL);
		if (!prop->sink_dpn_prop)
		return -ENOMEM;

		i = 0;
		dpn = prop->sink_dpn_prop;
		addr = prop->sink_ports;
		for_each_set_bit(bit, &addr, 32) {
		dpn[i].num = bit;
		dpn[i].type = SDW_DPN_FULL;
		dpn[i].simple_ch_prep_sm = true;
		dpn[i].ch_prep_timeout = 10;
		i++;
		}

		/* Allocate port_ready based on num_of_ports */
		slave->port_ready = devm_kcalloc(&slave->dev, num_of_ports,
		sizeof(*slave->port_ready),
		GFP_KERNEL);
		if (!slave->port_ready)
		return -ENOMEM;

		/* Initialize completion */
		for (i = 0; i < num_of_ports; i++)
		init_completion(&slave->port_ready[i]);

		/* set the timeout values */
		prop->clk_stop_timeout = 20;

		/* wake-up event */
		prop->wake_capable = 1;

		return 0;
		}

		static int rt700_bus_config(struct sdw_slave *slave,
		struct sdw_bus_params *params)
		{
		struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);
		int ret;

		memcpy(&rt700->params, params, sizeof(*params));

		ret = rt700_clock_config(&slave->dev);
		if (ret < 0)
		dev_err(&slave->dev, "Invalid clk config");

		return ret;
		}

		static int rt700_interrupt_callback(struct sdw_slave *slave,
		struct sdw_slave_intr_status *status)
		{
		struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);

		dev_dbg(&slave->dev,
		"%s control_port_stat=%x", __func__, status->control_port);

		if (status->control_port & 0x4) {
		mod_delayed_work(system_power_efficient_wq,
		&rt700->jack_detect_work, msecs_to_jiffies(250));
		}

		return 0;
		}

		/*
		* slave_ops: callbacks for get_clock_stop_mode, clock_stop and
		* port_prep are not defined for now
		*/
		static struct sdw_slave_ops rt700_slave_ops = {
		.read_prop = rt700_read_prop,
		.interrupt_callback = rt700_interrupt_callback,
		.update_status = rt700_update_status,
		.bus_config = rt700_bus_config,
		};

		static int rt700_sdw_probe(struct sdw_slave *slave,
		const struct sdw_device_id *id)
		{
		struct regmap sdw_regmap, regmap;

		/* Assign ops */
		slave->ops = &rt700_slave_ops;

		/* Regmap Initialization */
		sdw_regmap = devm_regmap_init_sdw(slave, &rt700_sdw_regmap);
		if (!sdw_regmap)
		return -EINVAL;

		regmap = devm_regmap_init(&slave->dev, NULL,
		&slave->dev, &rt700_regmap);
		if (!regmap)
		return -EINVAL;

		rt700_init(&slave->dev, sdw_regmap, regmap, slave);

		return 0;
		}

		static int rt700_sdw_remove(struct sdw_slave *slave)
		{
		struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);

		if (rt700 && rt700->hw_init) {
		cancel_delayed_work(&rt700->jack_detect_work);
		cancel_delayed_work(&rt700->jack_btn_check_work);
		}

		return 0;
		}

		static const struct sdw_device_id rt700_id[] = {
		SDW_SLAVE_ENTRY(0x025d, 0x700, 0),
		{},
		};
		MODULE_DEVICE_TABLE(sdw, rt700_id);

		static int rt700_dev_suspend(struct device *dev)
		{
		struct rt700_priv *rt700 = dev_get_drvdata(dev);

		if (!rt700->hw_init)
		return 0;

		regcache_cache_only(rt700->regmap, true);

		return 0;
		}

		#define RT700_PROBE_TIMEOUT 2000

		static int rt700_dev_resume(struct device *dev)
		{
		struct sdw_slave *slave = dev_to_sdw_dev(dev);
		struct rt700_priv *rt700 = dev_get_drvdata(dev);
		unsigned long time;

		if (!rt700->hw_init)
		return 0;

		if (!slave->unattach_request)
		goto regmap_sync;

		time = wait_for_completion_timeout(&slave->initialization_complete,
		msecs_to_jiffies(RT700_PROBE_TIMEOUT));
		if (!time) {
		dev_err(&slave->dev, "Initialization not complete, timed out\n");
		return -ETIMEDOUT;
		}

		regmap_sync:
		slave->unattach_request = 0;
		regcache_cache_only(rt700->regmap, false);
		regcache_sync_region(rt700->regmap, 0x3000, 0x8fff);
		regcache_sync_region(rt700->regmap, 0x752010, 0x75206b);

		return 0;
		}

		static const struct dev_pm_ops rt700_pm = {
		SET_SYSTEM_SLEEP_PM_OPS(rt700_dev_suspend, rt700_dev_resume)
		SET_RUNTIME_PM_OPS(rt700_dev_suspend, rt700_dev_resume, NULL)
		};

		static struct sdw_driver rt700_sdw_driver = {
		.driver = {
		.name = "rt700",
		.owner = THIS_MODULE,
		.pm = &rt700_pm,
		},
		.probe = rt700_sdw_probe,
		.remove = rt700_sdw_remove,
		.ops = &rt700_slave_ops,
		.id_table = rt700_id,
		};
		module_sdw_driver(rt700_sdw_driver);

		MODULE_DESCRIPTION("ASoC RT700 driver SDW");
		MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
		MODULE_LICENSE("GPL v2");

sound/soc/codecs/rt700-sdw.h

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Original line number	Diff line number	Diff line
		/* SPDX-License-Identifier: GPL-2.0 */
		/*
		* rt700-sdw.h -- RT700 ALSA SoC audio driver header
		*
		* Copyright(c) 2019 Realtek Semiconductor Corp.
		*/

		#ifndef __RT700_SDW_H__
		#define __RT700_SDW_H__

		static const struct reg_default rt700_reg_defaults[] = {
		{ 0x0000, 0x0000 },
		{ 0x0001, 0x0000 },
		{ 0x0002, 0x0000 },
		{ 0x0003, 0x0000 },
		{ 0x0004, 0x0000 },
		{ 0x0005, 0x0001 },
		{ 0x0020, 0x0000 },
		{ 0x0022, 0x0000 },
		{ 0x0023, 0x0000 },
		{ 0x0024, 0x0000 },
		{ 0x0025, 0x0000 },
		{ 0x0026, 0x0000 },
		{ 0x0030, 0x0000 },
		{ 0x0032, 0x0000 },
		{ 0x0033, 0x0000 },
		{ 0x0034, 0x0000 },
		{ 0x0035, 0x0000 },
		{ 0x0036, 0x0000 },
		{ 0x0040, 0x0000 },
		{ 0x0041, 0x0000 },
		{ 0x0042, 0x0000 },
		{ 0x0043, 0x0000 },
		{ 0x0044, 0x0020 },
		{ 0x0045, 0x0001 },
		{ 0x0046, 0x0000 },
		{ 0x0050, 0x0000 },
		{ 0x0051, 0x0000 },
		{ 0x0052, 0x0000 },
		{ 0x0053, 0x0000 },
		{ 0x0054, 0x0000 },
		{ 0x0055, 0x0000 },
		{ 0x0060, 0x0000 },
		{ 0x0070, 0x0000 },
		{ 0x00e0, 0x0000 },
		{ 0x00f0, 0x0000 },
		{ 0x0100, 0x0000 },
		{ 0x0101, 0x0000 },
		{ 0x0102, 0x0000 },
		{ 0x0103, 0x0000 },
		{ 0x0104, 0x0000 },
		{ 0x0105, 0x0000 },
		{ 0x0120, 0x0000 },
		{ 0x0121, 0x0000 },
		{ 0x0122, 0x0000 },
		{ 0x0123, 0x0000 },
		{ 0x0124, 0x0000 },
		{ 0x0125, 0x0000 },
		{ 0x0126, 0x0000 },
		{ 0x0127, 0x0000 },
		{ 0x0130, 0x0000 },
		{ 0x0131, 0x0000 },
		{ 0x0132, 0x0000 },
		{ 0x0133, 0x0000 },
		{ 0x0134, 0x0000 },
		{ 0x0135, 0x0000 },
		{ 0x0136, 0x0000 },
		{ 0x0137, 0x0000 },
		{ 0x0200, 0x0000 },
		{ 0x0201, 0x0000 },
		{ 0x0202, 0x0000 },
		{ 0x0203, 0x0000 },
		{ 0x0204, 0x0000 },
		{ 0x0205, 0x0000 },
		{ 0x0220, 0x0000 },
		{ 0x0221, 0x0000 },
		{ 0x0222, 0x0000 },
		{ 0x0223, 0x0000 },
		{ 0x0224, 0x0000 },
		{ 0x0225, 0x0000 },
		{ 0x0226, 0x0000 },
		{ 0x0227, 0x0000 },
		{ 0x0230, 0x0000 },
		{ 0x0231, 0x0000 },
		{ 0x0232, 0x0000 },
		{ 0x0233, 0x0000 },
		{ 0x0234, 0x0000 },
		{ 0x0235, 0x0000 },
		{ 0x0236, 0x0000 },
		{ 0x0237, 0x0000 },
		{ 0x0300, 0x0000 },
		{ 0x0301, 0x0000 },
		{ 0x0302, 0x0000 },
		{ 0x0303, 0x0000 },
		{ 0x0304, 0x0000 },
		{ 0x0305, 0x0000 },
		{ 0x0320, 0x0000 },
		{ 0x0321, 0x0000 },
		{ 0x0322, 0x0000 },
		{ 0x0323, 0x0000 },
		{ 0x0324, 0x0000 },
		{ 0x0325, 0x0000 },
		{ 0x0326, 0x0000 },
		{ 0x0327, 0x0000 },
		{ 0x0330, 0x0000 },
		{ 0x0331, 0x0000 },
		{ 0x0332, 0x0000 },
		{ 0x0333, 0x0000 },
		{ 0x0334, 0x0000 },
		{ 0x0335, 0x0000 },
		{ 0x0336, 0x0000 },
		{ 0x0337, 0x0000 },
		{ 0x0400, 0x0000 },
		{ 0x0401, 0x0000 },
		{ 0x0402, 0x0000 },
		{ 0x0403, 0x0000 },
		{ 0x0404, 0x0000 },
		{ 0x0405, 0x0000 },
		{ 0x0420, 0x0000 },
		{ 0x0421, 0x0000 },
		{ 0x0422, 0x0000 },
		{ 0x0423, 0x0000 },
		{ 0x0424, 0x0000 },
		{ 0x0425, 0x0000 },
		{ 0x0426, 0x0000 },
		{ 0x0427, 0x0000 },
		{ 0x0430, 0x0000 },
		{ 0x0431, 0x0000 },
		{ 0x0432, 0x0000 },
		{ 0x0433, 0x0000 },
		{ 0x0434, 0x0000 },
		{ 0x0435, 0x0000 },
		{ 0x0436, 0x0000 },
		{ 0x0437, 0x0000 },
		{ 0x0500, 0x0000 },
		{ 0x0501, 0x0000 },
		{ 0x0502, 0x0000 },
		{ 0x0503, 0x0000 },
		{ 0x0504, 0x0000 },
		{ 0x0505, 0x0000 },
		{ 0x0520, 0x0000 },
		{ 0x0521, 0x0000 },
		{ 0x0522, 0x0000 },
		{ 0x0523, 0x0000 },
		{ 0x0524, 0x0000 },
		{ 0x0525, 0x0000 },
		{ 0x0526, 0x0000 },
		{ 0x0527, 0x0000 },
		{ 0x0530, 0x0000 },
		{ 0x0531, 0x0000 },
		{ 0x0532, 0x0000 },
		{ 0x0533, 0x0000 },
		{ 0x0534, 0x0000 },
		{ 0x0535, 0x0000 },
		{ 0x0536, 0x0000 },
		{ 0x0537, 0x0000 },
		{ 0x0600, 0x0000 },
		{ 0x0601, 0x0000 },
		{ 0x0602, 0x0000 },
		{ 0x0603, 0x0000 },
		{ 0x0604, 0x0000 },
		{ 0x0605, 0x0000 },
		{ 0x0620, 0x0000 },
		{ 0x0621, 0x0000 },
		{ 0x0622, 0x0000 },
		{ 0x0623, 0x0000 },
		{ 0x0624, 0x0000 },
		{ 0x0625, 0x0000 },
		{ 0x0626, 0x0000 },
		{ 0x0627, 0x0000 },
		{ 0x0630, 0x0000 },
		{ 0x0631, 0x0000 },
		{ 0x0632, 0x0000 },
		{ 0x0633, 0x0000 },
		{ 0x0634, 0x0000 },
		{ 0x0635, 0x0000 },
		{ 0x0636, 0x0000 },
		{ 0x0637, 0x0000 },
		{ 0x0700, 0x0000 },
		{ 0x0701, 0x0000 },
		{ 0x0702, 0x0000 },
		{ 0x0703, 0x0000 },
		{ 0x0704, 0x0000 },
		{ 0x0705, 0x0000 },
		{ 0x0720, 0x0000 },
		{ 0x0721, 0x0000 },
		{ 0x0722, 0x0000 },
		{ 0x0723, 0x0000 },
		{ 0x0724, 0x0000 },
		{ 0x0725, 0x0000 },
		{ 0x0726, 0x0000 },
		{ 0x0727, 0x0000 },
		{ 0x0730, 0x0000 },
		{ 0x0731, 0x0000 },
		{ 0x0732, 0x0000 },
		{ 0x0733, 0x0000 },
		{ 0x0734, 0x0000 },
		{ 0x0735, 0x0000 },
		{ 0x0736, 0x0000 },
		{ 0x0737, 0x0000 },
		{ 0x0800, 0x0000 },
		{ 0x0801, 0x0000 },
		{ 0x0802, 0x0000 },
		{ 0x0803, 0x0000 },
		{ 0x0804, 0x0000 },
		{ 0x0805, 0x0000 },
		{ 0x0820, 0x0000 },
		{ 0x0821, 0x0000 },
		{ 0x0822, 0x0000 },
		{ 0x0823, 0x0000 },
		{ 0x0824, 0x0000 },
		{ 0x0825, 0x0000 },
		{ 0x0826, 0x0000 },
		{ 0x0827, 0x0000 },
		{ 0x0830, 0x0000 },
		{ 0x0831, 0x0000 },
		{ 0x0832, 0x0000 },
		{ 0x0833, 0x0000 },
		{ 0x0834, 0x0000 },
		{ 0x0835, 0x0000 },
		{ 0x0836, 0x0000 },
		{ 0x0837, 0x0000 },
		{ 0x0f00, 0x0000 },
		{ 0x0f01, 0x0000 },
		{ 0x0f02, 0x0000 },
		{ 0x0f03, 0x0000 },
		{ 0x0f04, 0x0000 },
		{ 0x0f05, 0x0000 },
		{ 0x0f20, 0x0000 },
		{ 0x0f21, 0x0000 },
		{ 0x0f22, 0x0000 },
		{ 0x0f23, 0x0000 },
		{ 0x0f24, 0x0000 },
		{ 0x0f25, 0x0000 },
		{ 0x0f26, 0x0000 },
		{ 0x0f27, 0x0000 },
		{ 0x0f30, 0x0000 },
		{ 0x0f31, 0x0000 },
		{ 0x0f32, 0x0000 },
		{ 0x0f33, 0x0000 },
		{ 0x0f34, 0x0000 },
		{ 0x0f35, 0x0000 },
		{ 0x0f36, 0x0000 },
		{ 0x0f37, 0x0000 },
		{ 0x2000, 0x0000 },
		{ 0x2001, 0x0000 },
		{ 0x2002, 0x0000 },
		{ 0x2003, 0x0000 },
		{ 0x2004, 0x0000 },
		{ 0x2005, 0x0000 },
		{ 0x2006, 0x0000 },
		{ 0x2007, 0x0000 },
		{ 0x2008, 0x0000 },
		{ 0x2009, 0x0003 },
		{ 0x200a, 0x0003 },
		{ 0x200b, 0x0000 },
		{ 0x200c, 0x0000 },
		{ 0x200d, 0x0000 },
		{ 0x200e, 0x0000 },
		{ 0x2012, 0x0000 },
		{ 0x2013, 0x0000 },
		{ 0x2014, 0x0000 },
		{ 0x2015, 0x0000 },
		{ 0x2016, 0x0000 },
		{ 0x201a, 0x0000 },
		{ 0x201b, 0x0000 },
		{ 0x201c, 0x0000 },
		{ 0x201d, 0x0000 },
		{ 0x201e, 0x0000 },
		{ 0x201f, 0x0000 },
		{ 0x2020, 0x0000 },
		{ 0x2021, 0x0000 },
		{ 0x2022, 0x0000 },
		{ 0x2023, 0x0000 },
		{ 0x2024, 0x0000 },
		{ 0x2025, 0x0002 },
		{ 0x2026, 0x0000 },
		{ 0x2027, 0x0000 },
		{ 0x2029, 0x0000 },
		{ 0x202a, 0x0000 },
		{ 0x202d, 0x0000 },
		{ 0x202e, 0x0000 },
		{ 0x202f, 0x0000 },
		{ 0x2030, 0x0000 },
		{ 0x2031, 0x0000 },
		{ 0x2032, 0x0000 },
		{ 0x2033, 0x0000 },
		{ 0x2034, 0x0000 },
		{ 0x2200, 0x0000 },
		{ 0x2201, 0x0000 },
		{ 0x2202, 0x0000 },
		{ 0x2203, 0x0000 },
		{ 0x2204, 0x0000 },
		{ 0x2206, 0x0000 },
		{ 0x2207, 0x0000 },
		{ 0x2208, 0x0000 },
		{ 0x2209, 0x0000 },
		{ 0x220a, 0x0000 },
		{ 0x220b, 0x0000 },
		{ 0x220c, 0x0000 },
		{ 0x220d, 0x0000 },
		{ 0x220e, 0x0000 },
		{ 0x220f, 0x0000 },
		{ 0x2211, 0x0000 },
		{ 0x2212, 0x0000 },
		{ 0x2220, 0x0000 },
		{ 0x2221, 0x0000 },
		{ 0x2222, 0x0000 },
		{ 0x2223, 0x0000 },
		{ 0x2230, 0x0000 },
		{ 0x2231, 0x0000 },
		{ 0x3121, 0x0001 },
		{ 0x3122, 0x0000 },
		{ 0x3123, 0x0000 },
		{ 0x7303, 0x0057 },
		{ 0x7303, 0x0057 },
		{ 0x8383, 0x0057 },
		{ 0x7308, 0x0097 },
		{ 0x8388, 0x0097 },
		{ 0x7309, 0x0097 },
		{ 0x8389, 0x0097 },
		{ 0x7312, 0x0000 },
		{ 0x8392, 0x0000 },
		{ 0x7313, 0x0000 },
		{ 0x8393, 0x0000 },
		{ 0x7319, 0x0000 },
		{ 0x8399, 0x0000 },
		{ 0x75201a, 0x8003 },
		{ 0x752045, 0x5289 },
		{ 0x752048, 0xd049 },
		{ 0x75204a, 0xa83b },
		{ 0x75206b, 0x5064 },
		};

		#endif /* __RT700_H__ */

sound/soc/codecs/rt700.c

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